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RT3602AE Datasheet(PDF) 5 Page - Richtek Technology Corporation

Part # RT3602AE
Description  Triple Channel PWM Controller for IMVP8 Mobile CPU Core Power Supply
PDF  46 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT3602AE Datasheet(HTML) 5 Page - Richtek Technology Corporation

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RT3602AE
DS3602AE-00 August 2017
www.richtek.com
©
Copyright 2017 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
Functional Block Diagram
Loop Control Protection
Logic
SVID Interface
Configuration Registers
Control Logic
UVLO
GND
FB_AUXI
COMP_AUXI
RGND_AUXI
Soft-Start &
Slew Rate Control
VSET_AUXI
ERROR
AMP
From Control Logic
Offset
Cancellation
ISENN_AUXI
ISENP_AUXI
+
-
+
-
DAC
TON
GEN/
Driver
Interface
+
-
PWM
CMP
+
-
+
RAMP
OV/UV/NV
OCS/OCP_TH
QRWIDTH
TONSET
QR
PWM_AUXI
QRTH
QRWIDTH
OCS
AI
TONSET
IMAX
ADDR
OLL
ANTIOVS
OCP
ADC
MUX
ADC
ADC
ADC
IMONI_AUXI
IMONI_MAIN
IMONI_SA
DRVEN
To Protection Logic
OC
AI
IMON_AUXI
ISEN1N
FB_MAIN
COMP_MAIN
RGND_MAIN
Soft-Start &
Slew Rate Control
VSET_MAIN
ERROR
AMP
From Control Logic
Offset
Cancellation
ISEN1N_MAIN
ISEN1P_MAIN
+
-
+
-
DAC
TON
GEN/
Driver
Interface
+
-
PWM
CMP
+
RAMP
QRWIDTH
TONSET
QR
PWM1_MAIN
IB1
VREF
+
-
Current Mirror
AI
ISEN2N_MAIN
ISEN2P_MAIN
+
-
IB2
IMON_MAIN
+
-
OV/UV/NV
OCS/OCP_TH
To Protection Logic
OC
ISEN1N_MAIN
IMONI_MAIN
FB_SA
COMP_SA
RGND_SA
Soft-Start &
Slew Rate Control
VSET
ERROR
AMP
From Control Logic
Offset
Cancellation
ISENN_SA
ISENP_SA
+
-
+
-
DAC
TON
GEN/
Driver
Interface
+
-
PWM
CMP
+
-
+
RAMP
OV/UV/NV
OCS/OCP_TH
QRWIDTH
TONSET
QR
PWM_SA
To Protection Logic
OC
AI
IMON_SA
ISENN
IMONI_AUXI
IMONI_SA
VINR
VIN
PWM2_MAIN
Current
Balance
IB2
x100%
IB1
x100%



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