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RT3602AE Datasheet(PDF) 25 Page - Richtek Technology Corporation |
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RT3602AE Datasheet(HTML) 25 Page - Richtek Technology Corporation |
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25 / 46 page ![]() 25 RT3602AE DS3602AE-00 August 2017 www.richtek.com © Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Phase Interleaving Function The RT3602AE is a multi-output controller, the AUXI rail of the IC has a phase interleaving function, 180 degree phase shift for 2-phase operation which can help reduce output voltage ripple and EMI problem. Multi-Function Pin Setting Mechanism For reducing total pin number of package, SET [1:3], TSEN_MAINand TSEN_AUXI pins adopt the multi-function pin setting mechanism in the RT3602AE. Figure 4 illustrates this operating mechanism for SET [1:3]. The voltage at VREF pin will be pulled up to 3.2V after power ready (POR). First, external voltage divider is used to set the Function1, and then internal current source 80 μA is used to set the Function2. The setting voltage of Function1 and Function2 can be represented as Function1 Function2 R2 V3.2V R1 R2 R1 R2 V80 Α R1 R2 All function setting will be done within 500 μs after power ready (POR), and the voltage at VREF pin will be fixed to 0.6V after all function setting over. If VFunction1 and VFunction2 are determined, R1 and R2 can be calculated as follows : Function2 Function1 Function1 Function1 3.2V V R1 80 Α V R1 V R2 3.2V V Connecting a R3 resistor from SETx pin or SETAx pin to the middle node of voltage divider can help to fine tune the set voltage of Function 2, which does not affect the set voltage of Function1. The Figure 5 shows the setting method and the set voltage of Function 1 and Function2 can be represented as : Function1 Function2 R2 V3.2V R1 R2 R1 R2 V80 Α R3 R1 R2 Figure 4. Multi-Function Pin Setting Mechanism for SET [1:3] VREF R1 R2 SETx 80µA Function 1 Register Function 2 Register ADC Function 1 <5:0> Function 2 <5:0> VREF R1 R2 SETx 80µA Function 1 Register Function 2 Register ADC Function 1 <5:0> Function 2 <5:0> Figure 5. Multi-Function Pin Setting Mechanism with a R3 Resistor to Fine Tune the Set Voltage of Function2 VREF R1 R2 80µA Function 1 Register Function 2 Register ADC Function 1 <5:0> Function 2 <5:0> R3 SETx VREF R1 R2 80µA Function 1 Register Function 2 Register ADC Function 1 <5:0> Function 2 <5:0> R3 SETx |
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