S71GS256 datasheet(109/195 Pages) SPANSION

109 / 195 page

October 4, 2004 cellRAM_00_A0

CellularRAM Type 2

109

Ad vance

Info rmat i o n

Page Mode READ Operation

Page mode is a performance-enhancing extension to the legacy asynchronous

READ operation. In page mode-capable products, an initial asynchronous read

access is performed, then adjacent addresses can be read quickly by simply

changing the low-order address. Addresses A[3:0] are used to determine the

members of the 16-address CellularRAM page. Addresses A[4] and higher must

remain fixed during the entire page mode access. Figure 25 shows the timing for

a page mode access. Page mode takes advantage of the fact that adjacent ad-

dresses can be read in a shorter period of time than random addresses. WRITE

operations do not include comparable page mode functionality.

During asynchronous page mode operation, the CLK input must be held LOW.

CE# must be driven HIGH upon completion of a page mode access. WAIT will be

driven while the device is enabled and its state should be ignored. Page mode is

enabled by setting RCR[7] to HIGH. WRITE operations do not include comparable

page mode functionality. ADV must be driven LOW during all page mode read

accesses.

Figure 24. WRITE Operation (ADV# LOW)

Data Valid

Address Valid

tWC = WRITE Cycle Time

CE#

OE#

WE#

ADDRESS

DATA

LB#/UB#

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S71GS256 Datasheet(PDF) 109 Page - SPANSION