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CS42L52 Datasheet(PDF) 20 Page - Cirrus Logic |
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CS42L52 Datasheet(HTML) 20 Page - Cirrus Logic |
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20 / 82 page ![]() 20 DS680A1 CS42L52 COMBINED DAC INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE 12. Response is clock dependent and will scale with Fs. Note that the response plots (Figures 30 and 33 on page 79) have been normalized to Fs and can be de-normalized by multiplying the X-axis scale by Fs. 13. Measurement Bandwidth is from Stopband to 3 Fs. Parameters (Note 12) Min Typ Max Unit Frequency Response 10 Hz to 20 kHz -0.01 - +0.08 dB Passband to -0.05 dB corner to -3 dB corner 0 0 - - 0.4780 0.4996 Fs Fs StopBand 0.5465 - - Fs StopBand Attenuation (Note 13) 50 - - dB Group Delay - 9/Fs - s De-emphasis Error Fs = 32 kHz Fs = 44.1 kHz Fs = 48 kHz - - - - - - +1.5/+0 +0.05/-0.25 -0.2/-0.4 dB dB dB |
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