 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TMPR4925 Datasheet(PDF) 354 Page - Toshiba Semiconductor |
|
|
|||||||||||||||||||||||||||||
TMPR4925 Datasheet(HTML) 354 Page - Toshiba Semiconductor |
|
|
354 / 590 page  Chapter 10 PCI Controller 10-92 10.4.64 PDMAC Count Register (PDMCTR) 0xD20C 31 24 23 16 Reserved PDMCTR[23:16] R/W : Type Undefined : Initial value 15 21 0 PDMCTR[15:2] Reserved R/W : Type Undefined : Initial value Bits Mnemonic Field Name Description 31:24 Reserved 23:2 PDMCTR Transfer Byte Count PDMAC Transfer Count (Initial value: undefined, R/W) Sets an uncoded 24-bit transfer byte count in 32-bit word units. Also, the setting of this register must always be a multiple of the transfer size specified inside the PDMAC Control Register. No data transfer is performed if a count of “0” is set. This byte count value is calculated from the transferred byte size as the PDMAC performs a DMA transfer. This register value is held without being affected by a Reset. 1:0 Reserved Figure 10.4.64 PDMAC Count Register |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
