80221 datasheet(25/91 Pages) LSI

25 / 91 page

80220/80221

4-25

MD400159/E

3.16 FULL DUPLEX MODE

3.16.1 100 Mbps

Full Duplex mode allows transmission and reception to

occur simultaneously. When Full Duplex mode is enabled,

collision is disabled and internal TX_EN to CRS loopback

is disabled.

The device can be either forced into Half or Full Duplex

mode, or the device can detect either Half or Full Duplex

capability from a remote device and automatically place

itself in the correct mode.

The device can be forced into the Full or Half Duplex

modes by setting the duplex bit in the MI serial port Control

The device can automatically configure itself for Full or

Half Duplex modes by using the AutoNegotiation algo-

rithm to advertise and detect Full and Half Duplex capabili-

ties to and from a remote terminal. All of this is described

in detail in the Link Integrity and AutoNegotiation section.

3.16.2 10 Mbps

Full Duplex in 10 Mbps mode is identical to the 100 Mbps

mode.

3.16.3 Full Duplex Indication

Full Duplex detection can be monitored through the duplex

bit in the MI serial port Status Output register, or it can also

be programmed to appear on the PLED1 pin by appropri-

ately setting the programmable LED output select bits in

the MI serial port Configuration 2 register as described in

Table 5. When the PLED1 pin is programmed to be a Full

Duplex detect output, this pin is asserted low when the

device is configured for Full Duplex operation. The PLED1

output has both pullup and pulldown driver transistors and

a weak pullup resistor, so it can drive an LED from either

VCC or GND and can also drive a digital input.

3.17 100/10 MBPS SELECTION

3.17.1 General

The device can be forced into either the 100 or 10 Mbps

mode, or the device also can detect 100 or 10 Mbps

capability from a remote device and automatically place

itself in the correct mode.

The device can be forced into either the 100 or 10 Mbps

mode by setting the speed select bit in the MI serial port

Control register.

The device can automatically configure itself for 100 or 10

Mbps mode by using the AutoNegotiation algorithm to

advertise and detect 100 and 10 Mbps capabilities to and

from a remote terminal. All of this is described in detail in

the Link Integrity & AutoNegotiation section.

3.17.2 10/100 Mbps Indication

The device speed (100/10 Mbps) can be determined

through the speed bit in the MI serial port Status Output

PLED0 pin by setting the

programmable LED output

select bits in the MI serial port Configuration 2 register.

When the PLED0 pin is programmed to be speed detect

output, this pin is asserted low when the device is config-

ured for 100 Mbps operation. The PLED0 output has both

pullup and pulldown driver transistors and a weak pullup

resistor, so it can drive an LED from either VCC or GND

and can also drive a digital input.

3.18 LOOPBACK

3.18.1 Internal CRS Loopback

TX_EN is internally looped back onto CRS during every

transmit packet. This internal CRS loopback is disabled

during collision, in Full Duplex mode, in Link Fail State, and

when the transmit disable bit is set in the MI serial port

Configuration 1 register. In 10 Mbps mode, internal CRS

loopback is also disabled when jabber is detected.

The internal CRS loopback can be disabled by setting the

TX_EN to CRS loopback disable bit in the MI serial port

Configuration 1 register. When this bit is set, TX_EN is no

longer looped back to CRS.

80221 Datasheet(PDF) 25 Page - LSI Computer Systems

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