TMS320C32PCMA50 datasheet(36/45 Pages) TI

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TMS320C32

DIGITAL SIGNAL PROCESSOR

SPRS027C – JANUARY 1995 – REVISED DECEMBER 1996

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

serial-port timing [P = tc(H)] (see Figure 29 and Figure 30) (continued)

FSX(EXT)

FSX(INT)

FSR

CLKX / R

Bit 0

Bit

n-1

Bit

n-2

Bit

n-1

Bit

n-2

NOTES: A. Timing diagrams show operations with CLKXP = CLKRP = FSXP = FSRP = 0.

B. Timing diagrams depend upon the length of the serial-port word, where

n = 8, 16, 24, or 32 bits, respectively.

Figure 29. Fixed Data-Rate-Mode Timing

CLKX / R

FSX(INT)

FSX(EXT)

FSR

Bit 0

Bit

n-2

Bit

n-3

Bit

n-2

Bit

n-3

Bit

n-1

Bit

n-1

NOTES: A. Timing diagrams show operation with CLKXP = CLKRP = FSXP = FSRP = 0.

B. Timing diagrams depend upon the length of the serial-port word, where

n = 8, 16, 24, or 32 bits, respectively.

C. The timings that are not specified expressly for the variable data-rate mode are the same as those that are specified

for the fixed data-rate mode.

Figure 30. Variable Data-Rate-Mode Timing

TMS320C32PCMA50 Datasheet(PDF) 36 Page - Texas Instruments

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