TMS320C32PCMA50 datasheet(15/45 Pages) TI

15 / 45 page

TMS320C32

DIGITAL SIGNAL PROCESSOR

SPRS027C – JANUARY 1995 – REVISED DECEMBER 1996

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

peripherals (continued)

Figure 9 shows the TMS320C32’s peripheral-bus control-register mapping, with the reserved areas shaded.

808069h

8097FFh

808068h

STRB1-Bus Control

808064h

STRB0-Bus Control

808060h

IOSTRB-Bus Control

80805Fh

808050h

80804Ch

Data Receive

808048h

Data Transmit

FSR/DR/CLKR Port Control

808046h

R/X Timer Period

808045h

R/X Timer Counter

808044h

R/X Timer Control

808043h

808042h

FSX/DX/CLKX Port Control

808014h

Serial Port Global Control

808040h

Timer 1 Period Register

808038h

Timer 1 Counter

808034h

Timer 1 Global Control

808030h

Timer 0 Period

808028h

Timer 0 Counter

808024h

Timer 0 Global Control

808020h

DMA 1 Transfer Counter

808018h

DMA 1 Destination Address

808016h

DMA 1 Source Address

808010h

DMA 1 Global Control

808009h

DMA 0 Transfer Counter

808008h

DMA 0 Destination Address

808006h

DMA 0 Source Address

808004h

808000h

DMA 0 Global Control

Reserved

Figure 9. Peripheral-Bus Memory-Mapped Registers

TMS320C32PCMA50 Datasheet(PDF) 15 Page - Texas Instruments

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