TMS320C32PCMA50 datasheet(14/45 Pages) TI

14 / 45 page

TMS320C32

DIGITAL SIGNAL PROCESSOR

SPRS027C – JANUARY 1995 – REVISED DECEMBER 1996

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

power management

The TMS320C32 CPU has two power-management modes, IDLE2 and LOPOWER (low power). In IDLE2

mode, no instructions are executed and the CPU, peripherals, and memory retain their previous state while the

external bus output pins are idle. During IDLE2 mode, the H1 clock signal is held high while the H3 clock signal

is held low until one of the four external interrupts is asserted. In the LOPOWER mode, the CPU continues to

execute instructions and the DMA continues to perform transfers, but at a reduced clock rate of the CLKIN

frequency divided by 16 (that is, TMS320C32 with a 32-MHz CLKIN frequency performs the same as a 2-MHz

TMS320C32 with an instruction cycle time of 1000 ns (1 MHz).

boot loader

The TMS320C32 flexible boot loader loads programs from the serial port, EPROM, or other standard

non-volatile memory device. The boot-loader functionality of the TMS320C32 is equivalent to that of the

TMS320C31, and has added modes to handle the data-type sizes and memory widths supported by the external

memory interface. The memory-boot load supports data transfers with and without handshaking. The

handshake mode allows synchronous transfer of programs by using two pins as data-acknowledge and

data-ready signals.

peripherals

The TMS320C32 peripherals are composed of one serial port, two timers, and two DMA channels. The serial

port and timers are the functional equivalent of those in the TMS320C31 peripherals. The TMS320C32

two-channel DMA coprocessor has user-configurable priorities: CPU, DMA, or rotating between CPU and DMA.

TMS320C32PCMA50 Datasheet(PDF) 14 Page - Texas Instruments