PCD5003 datasheet(25/44 Pages) PHILIPS

25 / 44 page

1997 Jun 24

Philips Semiconductors

Product speciﬁcation

Advanced POCSAG Paging Decoder

PCD5003

Table 19 Unused EEPROM addresses

Note

1. When using bytes 04H and 05H, care must be taken to

preserve the SPF information stored in

bytes 00H to 03H.

ROW

HEX

04 and 05(1)

528 to 2D

630 to 35

738 to 3D

7.54

Special programmed function allocation

The SPF bit allocation in the EEPROM is shown in

Tables 20 to 24. The SPF bits are located in row 0 of the

EEPROM and occupy 4 bytes.

Bytes 04H and 05H are not used and are available for

general purpose storage.

The contents of SPF (bytes 0 to 3) are read into the

associated logic only when the decoder is reset

(HIGH level in input RST).

Table 20 Special Programmed Functions (EEPROM address 00H)

Table 21 Special Programmed Functions (EEPROM address 01H)

Note

1. Since the exact establishment time is related to the programmed bit rate, Table 22 shows the values for the various

bit rates.

BIT (MSB: D7)

VALUE

DESCRIPTION

reserved for future use; logic 0 when read

reserved for future use

reserved for future use; logic 0 when read

received data inversion enabled

BIT (MSB: D7)

VALUE

DESCRIPTION

D1 and D0

0 0

5 ms receiver establishment time (nominal); note 1

0 1

10 ms

1 0

15 ms

1 1

30 ms

D3 and D2

0 0

20 ms oscillator establishment time (nominal); note 1

0 1

30 ms

1 0

40 ms

1 1

50 ms

D5 and D4

0 0

512 bits/s received bit rate

0 1

1024 bits/s (not used in POCSAG)

1 0

1200 bits/s

1 1

2400 bits/s

synthesizer interface enabled (data is output via ZSD, ZSC

and ZLE at decoder switch-on)

voltage converter enabled

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