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AMD-K6-2E/233AMZ Datasheet(PDF) 33 Page - Advanced Micro Devices |
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AMD-K6-2E/233AMZ Datasheet(HTML) 33 Page - Advanced Micro Devices |
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33 / 332 page  Chapter 2 Internal Architecture 15 22529B/0—January 2000 AMD-K6™-2E Processor Data Sheet Preliminary Information Figure 4. AMD-K6™-2E Processor Decode Logic The AMD-K6-2E processor uses a combination of decoders to convert x86 instructions into RISC86 operations. The hardware consists of three sets of decoders—two parallel short decoders, one long decoder, and one vector decoder. Parallel Short Decoders. The two parallel short decoders translate the most commonly-used x86 instructions ( moves, shifts, branches, ALU, FPU) and the extensions to the x86 instruction set (MMX and 3DNow! technology) into zero, one, or two RISC86 operations each. The short decoders only operate on x86 instructions that are up to seven bytes long. In addition, the decoders are designed to decode up to two x86 instructions per clock. Instruction Buffer 4 RISC86 Operations Long Decoder Short Decoder #1 Short Decoder #2 Vector Address Vector Decoder RISC86® Sequencer On-Chip ROM |
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