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AMD-K6-2E/233AMZ Datasheet(PDF) 59 Page - Advanced Micro Devices |
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AMD-K6-2E/233AMZ Datasheet(HTML) 59 Page - Advanced Micro Devices |
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59 / 332 page  Chapter 3 Software Environment 41 22529B/0—January 2000 AMD-K6™-2E Processor Data Sheet Preliminary Information MCAR and MCTR The AMD-K6-2E processor does not support the generation of a machine-check exception. However, the processor does provide a 64-bit machine-check address register (MCAR), a 64-bit machine-check type register (MCTR), and a machine check enable (MCE) bit in CR4. Because the processor does not support machine check exceptions, the contents of the MCAR and MCTR registers are only affected by the WRMSR instruction and by RESET being sampled asserted (where all bits in each register are reset to 0). The formats for the machine-check address register and the machine-check type register are shown in Figure 30 and Figure 31, respectively. Figure 30. Machine-Check Address Register (MCAR) Figure 31. Machine-Check Type Register (MCTR) 0 63 MCAR 54 0 63 MCTR Reserved |
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