AMD-K6-2ESLASH233AMZ datasheet(40/332 Pages) AMD

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Internal Architecture

Chapter 2

AMD-K6™-2E Processor Data Sheet

22529B/0—January 2000

Preliminary Information

Entry into the subroutine occurs with the execution of a CALL

instruction. At that time, the processor pushes the address of

the next instruction in memory following the CALL instruction

onto the stack (allocated space in memory). When the processor

encounters a RET instruction (within or at the end of the

subroutine), the branch logic pops the address from the stack

and begins fetching from that location. To avoid the latency of

main memory accesses during CALL and RET operations, the

return address stack caches the pushed addresses.

Branch Execution

Unit

The branch execution unit enables efficient speculative

execution. This unit gives the processor the ability to execute

instructions beyond conditional branches before knowing

whether the branch prediction was correct.

The AMD-K6-2E processor does not permanently update the

x86 registers or memory locations until all speculatively

executed conditional branch instructions are resolved. When a

prediction is incorrect, the processor backs out to the point of

the mispredicted branch instruction and restores all registers.

The AMD-K6-2E processor can support up to seven outstanding

branches.

AMD-K6-2E/233AMZ Datasheet(PDF) 40 Page - Advanced Micro Devices