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AK4635 Datasheet(PDF) 45 Page - Asahi Kasei Microsystems |
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AK4635 Datasheet(HTML) 45 Page - Asahi Kasei Microsystems |
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45 / 81 page ![]() [AK4635] Rev. 0.6 2007/10 - 45 - ■ ALC Operation ALC Operation works in ALC block. When ADCPF bit = “1”, ALC operation is enable for recording path. When ADCPF bit = “0”, ALC operation is enable for playback path. The ON/OFF of ALC operation for recording is controlled by ALC1 bit and the ON/OFF of ALC operation for playback is controlled by ALC2 bit. 1. ALC Limiter Operation When the ALC limiter is enabled, and output exceeds the ALC limiter detection level (Table 25), the volume value is attenuated by the amount defined in LMAT1-0 bits (Table 26) automatically. When the ZELMN bit = “0” (zero crossing detection valid), the VOL value is changed by ALC limiter operation at the zero crossing point or zero crossing timeout. Zero crossing timeout period is set by ZTM1-0 bit that in common with ALC recovery zero crossing timeout period’s setting (Table 27).At LFST bit = “1”, VOL value is attenuated 1step immediately (period : 1/fs) when output Level is over FS(Digital Full Scale). When the ZELMN bit = “1” (zero crossing detection invalid), VOL value has been changed immediately (period: 1/fs) by ALC limiter operation. The attenuation for limiter operation is fixed to 1 step and not controlled by setting LMAT1-0 bits. After finishing the attenuation operation, if ALC bit does not change to “0”, the operation repeats when the output signal level exceeds the ALC limiter detection level. LMTH1 LMTH0 ALC Limiter Detection Level ALC Recovery Waiting Counter Reset Level 0 0 ALC Output ≥ −2.5dBFS −2.5dBFS > ALC Output ≥ −4.1dBFS 0 1 ALC Output ≥ −4.1dBFS −4.1dBFS > ALC Output ≥ −6.0dBFS (default) 1 0 ALC Output ≥ −6.0dBFS −6.0dBFS > ALC Output ≥ −8.5dBFS 1 1 ALC Output ≥ −8.5dBFS −8.5dBFS > ALC Output ≥ −12dBFS Table 25. ALC Limiter Detection Level / Recovery Waiting Counter Reset Level ALC1 Limiter ATT Step LMAT1 LMAT0 ALC1 Output ≥ LMTH ALC1 Output ≥ FS ALC1 Output ≥ FS + 6dB ALC1 Output ≥ FS + 12dB 0 0 1 1 1 1 (default) 0 1 2 2 2 2 1 0 2 4 4 8 1 1 1 2 4 8 Table 26. ALC Limiter ATT Step Setting Zero Crossing Timeout Period ZTM1 ZTM0 8kHz 16kHz 44.1kHz 0 0 128/fs 16ms 8ms 2.9ms (default) 0 1 256/fs 32ms 16ms 5.8ms 1 0 512/fs 64ms 32ms 11.6ms 1 1 1024/fs 128ms 64ms 23.2ms Table 27. ALC Zero Crossing Timeout Period Setting |
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