MPC8280 datasheet(451/1386 Pages) FREESCALE

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Memory Controller

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

11-31

Table 11-14 describes LURT fields.

11.3.10 60x Bus-Assigned SDRAM Refresh Timer (PSRT)

The 60x bus assigned SDRAM refresh timer register (PSRT) is shown in Figure 11-16.

Table 11-15 describes PSRT fields.

Table 11-14. Local Bus-Assigned UPM Refresh Timer (LURT)

Bits

Name

Description

0–7

LURT

Refresh timer period. Determines the timer period according to the following equation:

This timer generates a refresh request for all valid banks that selected a UPM machine assigned to

the local bus (M

xMR[BSEL] =1) and is refresh-enabled (MxMR[RFEN] =1). Each time the timer

expires, a qualified bank generates a refresh request using the selected UPM. The qualified banks

are rotating their requests.

Example: For a 25-MHz system clock and a required service rate of 15.6 µs, given

MPTPR[PTP] = 31, the LURT value should be 11 decimal. (12*32)/25 MHz = 15.36 µs, which is less

than the required service period of 15.6 µs.

Field

PSRT

Reset

0000_0000

R/W

Addr

0x1019C

Figure 11-16. 60x Bus-Assigned SDRAM Refresh Timer (PSRT)

Table 11-15. 60x Bus-Assigned SDRAM Refresh Timer (PSRT)

Bits

Name

Description

0–7

PSRT

Refresh timer period. Determines the timer period according to the following equation:

This timer generates refresh requests for all valid banks that selected a SDRAM machine assigned

to the 60x bus and is refresh-enabled (PSDMR[RFEN] = 1). Each time the timer expires, all banks

that qualify generate a bank staggering auto refresh request using the SDRAM machine. See

Section 11.4.10, “SDRAM Refresh.”

Example: For a 25-MHz system clock and a required service rate of 15.6 µs, given

MPTPR[PTP] = 31, the PSRT value should be 11decimal. (12*32)/25 MHz = 15.36 µs, which is less

than the required service period of 15.6 µs.

TimerP eriod

LURT

()

MPTPR PTP

[] 1

()

Bus Frequency

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⎝⎠

⎛⎞

TimerPeriod

PSRT

()

MPTPR PT P

[] 1

()

Bus Frequency

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⎝⎠

⎛⎞

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