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MPC8280 Datasheet(PDF) 481 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 481 Page - Freescale Semiconductor, Inc

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Memory Controller
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
Freescale Semiconductor
11-61
Figure 11-53. GPCM Read Followed by Write (OR
x[29–30] = 10)
11.5.2
External Access Termination
External access termination is supported by the GPCM using GTA, which is synchronized and sampled
internally by the MPC8280. If, during a GPCM data phase (second cycle or later), the sampled signal is
asserted, it is converted to PSDVAL, which terminates the current GPCM access. GTA should be asserted
for one cycle. Note that because GTA is synchronized, bus termination may occur three cycles after GTA
assertion, so in case of read cycle, the device still must output data as long as OE is asserted. The user
selects whether PSDVAL is generated internally or externally (by means of GTA assertion) by
resetting/setting ORx[SETA].
Figure 11-54 shows how a GPCM access is terminated by GTA assertion. Asserting GTA terminates an
access even if ORx[SETA] = 0 (internal PSDVAL generation).
Clock
Address
PSDVAL
CSx
CSy
BCTL
x
OE
Data
Hold Time



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