MPC8280 datasheet(543/1386 Pages) FREESCALE

543 / 1386 page

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

IV-1

Part IV

Communications Processor Module

Intended Audience

Part IV is intended for system designers who need to implement various communications protocols on the

MPC8280. It assumes a basic understanding of the PowerPC exception model, the MPC8280 interrupt

structure, as well as a working knowledge of the communications protocols to be used. A complete

discussion of these protocols is beyond the scope of this book.

Contents

Part IV describes behavior of the MPC8280 communications processor module (CPM) and the RISC

communications processor (CP) that it contains (note that this is separate from the embedded processor

that implements the PowerPC architecture).

It contains the following chapters:

•

Chapter 14, “Communications Processor Module Overview,” provides a brief overview of the

MPC8280 CPM.

•

Chapter 15, “Serial Interface with Time-Slot Assigner,” describes the SIU, which controls system

start-up, initialization and operation, protection, as well as the external system bus.

•

Chapter 16, “CPM Multiplexing,” describes the CPM multiplexing logic (CMX) which connects

the physical layer—UTOPIA, MII, modem lines,

•

Chapter 17, “Baud-Rate Generators (BRGs),” describes the eight independent, identical baud-rate

generators (BRGs) that can be used with the FCCs, SCCs, and SMCs.

•

Chapter 18, “Timers,” describes the MPC8280 timer implementation, which can be configured as

four identical 16-bit or two 32-bit general-purpose timers.

•

Chapter 19, “SDMA Channels and IDMA Emulation,” describes the two physical serial DMA

(SDMA) channels on the MPC8280.

•

Chapter 20, “Serial Communications Controllers (SCCs),” describes the four serial

communications controllers (SCC), which can be configured independently to implement different

protocols for bridging functions, routers, and gateways, and to interface with a wide variety of

standard WANs, LANs, and proprietary networks.

•

Chapter 21, “SCC UART Mode,” describes the MPC8280 implementation of universal

asynchronous receiver transmitter (UART) protocol that is used for sending low-speed data

between devices.

•

Chapter 22, “SCC HDLC Mode,” describes the MPC8280 implementation of HDLC protocol.

MPC8280 Datasheet(PDF) 543 Page - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 543 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL