MPC8280 datasheet(767/1386 Pages) FREESCALE

767 / 1386 page

SCC BISYNC Mode

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

23-13

Data length and buffer pointer fields are described in Section 20.2, “SCC Buffer Descriptors (BDs).” Data

length represents the number of octets the CP writes into this buffer, including the BCS. For BISYNC

mode, clear these bits. It is incremented each time a received character is written to the buffer.

Wrap (last BD in table).

0 Not the last BD in the table.

1 Last BD in the table. After this buffer is used, the CP receives incoming data into the first BD that

RBASE points to. The number of BDs in this table is determined by the W bit and by overall space

constraints of the dual-port RAM.

Interrupt.

0 No interrupt is generated after this buffer is used.

1 SCCE[RXB] is set when the controller closes this buffer, which can cause an interrupt if it is

enabled.

Control Character. The last byte in the buffer is a user-defined control character.

0 The last byte of this buffer does not contain a control character.

1 The last byte of this buffer contains a control character.

BCS received. The last bytes in the buffer contain the received BCS.

0 This buffer does not contain the BCS.

1 This buffer contains the BCS. A control character may also reside one byte prior to this BCS.

Continuous mode.

0 Normal operation.

1 The CP does not clear E after this BD is closed; the buffer is overwritten when the CP accesses

this BD next. However, E is cleared if an error occurs during reception, regardless of how CM is

set.

—

Reserved, should be cleared.

DPLL error. Set when a DPLL error occurs during reception. In decoding modes where a transition

is should occur every bit, the DPLL error is set when a transition is missing.

9–10

—

Reserved, should be cleared.

DLE follow character error. While in transparent mode, a DLE character was received, and the next

character was not DLE, SYNC, or a valid entry in the control characters table.

Parity error. Set when a character with parity error is received. Upon a parity error, the buffer is

closed; thus, the corrupted character is the last byte of the buffer. A new Rx buffer receives

subsequent data.

BCS error. Updated every time a byte is written to the buffer. The CR bit includes the calculation for

the current byte. By clearing PSMR[RCBS] within eight serial clocks, the user can exclude the

current character from the message BCS calculation. The data length field may be read to

determine the current character’s position.

Overrun. Set when a receiver overrun occurs during frame reception.

Carrier detect lost. Indicates when the carrier detect signal, CD, is negated during frame reception.

Table 23-11. SCC BISYNC RxBD Status and Control Field Descriptions (continued)

Bits

Name

Description

MPC8280 Datasheet(PDF) 767 Page - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 767 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL