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MPC8280 Datasheet(PDF) 842 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 842 Page - Freescale Semiconductor, Inc |
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842 / 1386 page ![]() Universal Serial Bus Controller MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 27-26 Freescale Semiconductor The receive buffer pointer always points to the first location of the associated buffer. The pointer must be divisible by 4. The buffer may reside in either internal or external memory. 27.6.2 USB Transmit Buffer Descriptor (Tx BD) for Function Data that the USB function wishes to transmit to the host is arranged in buffers referenced by the Tx BD ring. The first word of the Tx BD contains the status and control bits. Table 27-17 describes USB TxBD fields. 012 34567 89 10 11 12 13 14 15 OFFSET + 0 R — W I L TC CNF PID —TO UN — OFFSET + 2 DATA LENGTH OFFSET + 4 TX DATA BUFFER POINTER OFFSET + 6 Figure 27-19. USB Transmit Buffer Descriptor (Tx BD)1,2 1 Entries in boldface must be initialized by the user. 2 All fields should be prepared by the user before transmission. Table 27-17. USB Function Tx BD Fields Offset Bit Name Description 0x00 0 R Ready 0 The data buffer associated with this BD is not ready for transmission. The user is free to manipulate this BD or its associated data buffer. The CP clears this bit after the buffer has been transmitted or after an error condition is encountered. 1 The data buffer, which has been prepared for transmission by the user, has not been transmitted or is currently being transmitted. No fields of this BD may be written by the user once this bit is set. 1 — Reserved, should be cleared 2 W Wrap (Final BD in table) 0 This is not the last BD in the Tx BD table. 1 This is the last BD in the Tx BD table. After this buffer has been used, the CP will send data using the first BD in the table (the BD pointed to by TBASEx). The number of Tx BDs in this table is programmable, and is determined only by the Tx BD[W] and the overall space constraints of the dual-port RAM. 3 I Interrupt 0 No interrupt is generated after this buffer has been serviced. 1The TXB or TXE bit in the event register is set when this buffer is serviced. TXB and TXE can cause interrupts if they are enabled. 4 L Last 0 Buffer does not contain the last byte of the message 1 Buffer contains the last byte of the message 5 TC Transmit CRC. Valid only when the L bit is set; otherwise it is ignored. Prepare TC before sending data. 0 Transmit end-of-packet after the last data byte. This setting can be used for testing purposes to send a bad CRC after the data. 1 Transmit the CRC sequence after the last data byte. |
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