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MPC8280 Datasheet(PDF) 894 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 894 Page - Freescale Semiconductor, Inc

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Multi-Channel Controllers (MCCs)
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
29-4
Freescale Semiconductor
29.2
Global MCC Parameters
The global MCC parameters are described in Table 29-1.
Table 29-1. Global MCC Parameters
Offset1
Name
Width
Description
0x00
MCCBASE
Word
MCC base pointer. User-initialized parameter points to the starting address of a
512-Kbyte BD segment in external memory.
0x04
MCCSTATE
Hword MCC state. Used by the CP for global state definition. Should be cleared during
initialization.
0x06
MRBLR
Hword Maximum receive buffer length (user-initialized). Defines the maximum number of
bytes written to a receive buffer before moving to the next buffer for this channel. This
value must be a multiple of 8.
0x08
GRFTHR
Hword Global receive frame threshold. Used to reduce interrupt overhead that would
otherwise occur when many short HDLC frames arrive that each cause an RXF
interrupt. Programming GRFTHR can be used to limit the frequency of RXF
interrupts. In normal operation, an unmasked RXF event is written to the interrupt
table on each received frame. However, a user may choose to mask the RXF event
and program GRFTHR instead. If the user places a non-zero value in GRFTHR,
RINT
x is asserted in the MCC event register when the number of RXF events reaches
the GRFTHR value. Therefore, note that in addition to indicating new interrupt queue
entries, the assertion of RINT
x could then also be due to the threshold of received
frames being reached due to activity on any of this MCC’s receive channels.
Therefore, software should look for frames in all active buffer descriptor rings. This
parameter does not need to be reset after an interrupt.
0x0A
GRFCNT
Hword Global receive frame count. A down counter used to implement the GRFTHR feature.
It should be initialized to the GRFTHR value. The CP writes an entry in a circular
interrupt table and decrements GRFCNT each time a frame is received. When
GRFCNT reaches zero, the CP generates an interrupt and re-initializes GRFCNT with
GRFTHR. This parameter does not need to be reset after an interrupt.
0x0C
RINTTMP
Word
Temporary location for holding the receive interrupt queue entry, used by the CP
(reserved)
0x10
DATA0
Word
Temporary location for holding data, used by the CP (reserved)
0x14
DATA1
Word
Temporary location for holding data, used by the CP (reserved)
0x18
TINTBASE
Word
Multi-channel transmitter circular interrupt table base address. The interrupt circular
table is a cyclic table (FIFO-like). Each table entry contains information about an
interrupt request generated by the MCC to the host.
0x1C
TINTPTR
Word
Pointer to the transmitter circular interrupt table. The CP writes the next interrupt
information to this entry when an exception occurs. The user must copy the
TINTBASE value to TINTPTR before enabling interrupts. Further updates of the
TINTPTR are done by the CP.
0x20
TINTTMP
Word
Temporary location for holding the transmit interrupt queue entry, used by the CP. The
60x initializes this field before initializing the MCC. The user must clear it before
enabling interrupts.
0x24
SCTPBASE
Hword Internal pointer for the super channel transmit table, offset from the DPRAM address
0x26
—
Hword



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