MPC8280 datasheet(917/1386 Pages) FREESCALE

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Multi-Channel Controllers (MCCs)

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

29-27

29.3.4.5

Octet Counting Mode—SS7 Mode

When entering the octet counting mode (OCM), the CP will load the user defined N register to its internal

octet counter. While in the octet counting mode the CP will decrement its internal counter for every

unstuffed octet received. When the internal counter is decremented to zero, the CP increment the SUERM

generated depending on the interrupt mask. The SS7 controller will enter octet counting mode under the

following circumstances:

•

An ABORT character is received at any time and SS7_OPT[O_ITUT] is set.

•

The SU currently being received has exceeded the length programmed in the MFLR register and

SS7_OPT[O_ITUT] is set.

•

The receiver overruns and SS7_OPT[O_ORN] is set. Note that when no receive buffers are

available, only octets are counted; that is, D_cnt is not decremented after receiving the frame.

The SS7 controller will leave octet counting mode when a valid signal unit is detected (with a valid CRC

and a length less than MFLR and greater than 4).

NOTE

Octet counting mode applies only to the ITU-T and ANSI standards. The

SS7 microcode will not work if both the Japanese standard and OCM

features are selected.

29.4

Channel Extra Parameters

In addition to the information kept in the channel-specific parameter ram, a channel also has a set of

pointers used to index its transmit and receive buffer descriptors. This information is kept in a set of

channel-extra parameters. Table 29-14 describes the channel-extra parameters. These parameters are

indexed using the channel number, as described in the table.

Table 29-14. Channel Extra Parameters

Offset1

1 The offset relative to dual-port RAM base address + XTRABASE + 8*CH_NUM

Name

Width

Description

0x00

TBASE Hword TxBD base address. Used to calculate offset of the channel’s TxBD table relative to the

MCCBASE (The base address of the BD table for this channel MCCBASE+8*TBASE)

0x02

TBPTR

Hword TxBD pointer. Used to calculate offset of the current BD relative to the MCCBASE. TBPTR

is user-initialized to TBASE before enabling the channel or after a fatal error before

reinitializing the channel. (The address of the BD in use for this channel

MCCBASE+8*TBPTR)

0x04

RBASE Hword RxBD base address. Used to calculate offset of the channel’s RxBD table relative to the

MCCBASE. (The base address of the BD table for this channel MCCBASE+8*RBASE)

0x06

RBPTR Hword RxBD pointer. Used to calculate offset of the current BD relative to the MCCBASE.

RBPTR is user-initialized to RBASE before enabling the channel or after a fatal error

before reinitializing the channel. (The address of the BD in use for this channel

MCCBASE+8*RTBPTR)

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