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MPC8280 Datasheet(PDF) 922 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 922 Page - Freescale Semiconductor, Inc |
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922 / 1386 page ![]() Multi-Channel Controllers (MCCs) MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 29-32 Freescale Semiconductor Figure 29-16. Receiver Super Channel without Slot Synchronization Example 29.6 MCC Configuration Registers (MCCF x) The MCC configuration register (MCCF), shown in Figure 29-17, defines the mapping of the MCC channels to the TDM channels. MCC1 can be connected to SI1 and MCC2 can be connected to SI2. For each MCCx-SIx pair, each of the four 32 channels subgroups can be connected to one of the four TDM highways (TDMA, TDMB, TDMC, and TDMD). Table 29-15 describes MCCF fields. 01234567 Field Group 1 Group 2 Group 3 Group 4 Reset 0000_0000 R/W R/W Addr 0x11B38 (MCCF1), 0x11B58 (MCCF2) Figure 29-17. SI MCC Configuration Register (MCCF) Table 29-15. MCCF Field Descriptions Bits Name Description 0–1, 2–3, 4–5, 6–7 GROUP x Group x of channels is used by TDM y as shown in Table 29-16. 00 Group x is used by TDM A. 01 Group x is used by TDM B. 10 Group x is used by TDM C. 11 Group x is used by TDM D. 0 1 2 3–10 11–13 14 15 MCC LOOP SUPER MCSEL CNT BYT LST SI RAM Address 100 0x0 0x0 1 0 Regular Channel 1 0 0 0x1 0x0 1 0 Super Channel 1 100 0x2 0x0 1 0 Super Channel 2 1 0 0 0x2 0x0 1 0 Super Channel 2 100 0x2 0x0 1 0 Super Channel 2 1 0 0 0x5 0x0 1 0 Regular Channel 100 0x1 0x0 1 0 Super Channel 1 100 0x1 0x0 1 0 Super Channel 1 1 0 0 0x8 0x0 1 1 Regular Channel The super channel BD tables are associated with channels 1 and 2 SI RAM |
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