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MPC8280 Datasheet(PDF) 1077 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 1077 Page - Freescale Semiconductor, Inc

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ATM AAL1 Circuit Emulation Service
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
Freescale Semiconductor
32-17
Table 32-2 describes CES adaptive threshold table fields.
07
8
15
Offset + 0x00
—
CES Adaptive Counter
Offset + 0x02
ATM Stop Threshold
ATM Start Threshold
Offset + 0x04
MCC Stop Threshold
MCC Start Threshold
Offset + 0x06
—
Figure 32-15. CES Adaptive Threshold Table
Table 32-2. CES Adaptive Threshold Table Field Descriptions
Offset1
1 The offset is CATB + RCT[Super_Channel_Number]# × 8
Bits
Name
Description
0x00
0–7
—
Reserved, should be cleared during initialization.
8–15 CESAC CES adaptive counter.This field contains the difference between the ATM write pointer and
the MCC read pointer on the common BD table.This field should be cleared by the user
during the channel initialization.
0x02
0–7
ASTP
ATM stop threshold.This threshold determines the maximum amount of buffering (CDVT)
that required in the common BD table (shown in Figure 32-16). When the CESAC reaches
this value a pre-overrun condition occurs.This field should be defined by the user during the
channel initialization.
8–15
ASTRT ATM start threshold.This threshold determines the Time interval that will take the ATM
controller to restart the synchronize process (shown in Figure 32-16) after pre-overrun
condition.This field should be defined by the user during the channel initialization.
0x04
0–7
MSTP
MCC stop threshold.This threshold determines the minimum amount of buffering in the
common BD table (shown in Figure 32-16).When the CESAC reaches this value a
pre-underrun condition occur and the MCC starts to transmit the underrun template or the
last BD (see Section 32.5, “ATM-to-TDM Adaptive Slip Control”).This field should be defined
by the user during the channel initialization.
8–15 MSTRT MCC start threshold.This threshold determines the effective depth of the jitter buffer, the
amount of buffering required to cope with the ATM network’s CDV (shown in
Figure 32-16).When the CESAC reaches this value the MCC transmitter starts sending the
valid data from the common BD table.This field should be defined by the user during the
channel initialization.
0x06
0–15
—
Reserved, should be cleared during initialization.



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