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MPC8280 Datasheet(PDF) 1220 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 1220 Page - Freescale Semiconductor, Inc

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ATM Transmission Convergence Layer
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
35-4
Freescale Semiconductor
cell header. The cell delineation algorithm assumes that repetitive correct HEC calculations over
consecutive cells indicate valid ATM cell boundaries.
The RCF performs a sequential bit by bit hunt for a correct HEC sequence. While performing this hunt,
the cell delineation state machine is in HUNT state. When a correct HEC is found, the RCF locks on the
particular cell boundary and enters the PRESYNCH state, which indicates that the previously detected
HEC pattern is not a false indication. If a correct HEC pattern is false, an incorrect HEC is received within
the next DELTA cells. If an incorrect cell is detected, then a transition to the HUNT state is made. If an
incorrect HEC is not detected in the PRESYNCH state, a transition to the SYNCH state is made. In the
SYNCH state, the TC is assumed to be synchronized so that other functions can be applied to the received
cell. A transition back to the HUNT state is made only after ALPHA consecutive incorrect HEC patterns
are detected.
The cell delineation state machine is shown in Figure 35-3. The ALPHA and DELTA parameters
determine the robustness of the delineation method. ALPHA determines the robustness against false
misalignment due to bit errors. DELTA determines the robustness against false delineation in the
synchronization. Both parameters are programmable for each TC block and are provided to help tune the
system according to the line error characteristics of a specific application.
Figure 35-3. TC Cell Delineation State Machine
The RCF descrambles (programmable) the cell payload using the self-synchronizing descrambler with a
polynomial of x43 + 1.
The HEC calculation is a CRC-8 calculation over the first four octets of the ATM cell header. The RCF
verifies the received HEC using the accumulation polynomial, x8 + x2 + x + 1. The coset polynomial
x6 +x4 + x2 + 1 is added (modulo 2) to the received HEC octet before comparison with the calculated
result (programmable).
The RCF can perform single bit error correction on the header. If multiple bit errors are found in the HEC,
the cell is discarded. If the single bit error correction mode is not enabled (TCMODE[SBC] = 1), the cell
is also discarded when a single bit error is found in the header.
HUNT
PRESYNCH
SYNCH
DELTA Consecutive
Correct HEC
Correct HEC
Incorrect HEC
ALPHA
Incorrect HEC
Consecutive
Bit-by-Bit
Cell-by-Cell
Cell-by-Cell



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