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MPC8280 Datasheet(PDF) 1221 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 1221 Page - Freescale Semiconductor, Inc |
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1221 / 1386 page ![]() ATM Transmission Convergence Layer MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 35-5 When the cell delineation state machine is in the SYNCH state, the HEC verification state machine (see Figure 35-4) implements the correction algorithm. This state machine makes sure that a single cell header is corrected at a time. If consecutive cells are detected with single bit errors in their headers, only the first cell error is corrected and the rest are discarded. This state machine reduces the probability of the delivery of cells with errored headers under bursty error conditions. Figure 35-4. HEC: Receiver Modes of Operation The RCF can also perform idle/unassigned cell filtering. Both features are programmable (TCMODE[CF]). Cells that are detected to be idle/unassigned are discarded, that is, not forwarded to the UTOPIA interface Rx FIFO. 35.2.1.1 Receive ATM 2-Cell FIFO The receive FIFO provides FIFO management and an interface to the UTOPIA receive cell interface. The receive FIFO can hold two ATM cells, thereby providing the cell rate decoupling function between the transmission system physical layer and the ATM layer. FIFO management includes filling the FIFO, indicating to the UTOPIA interface that it contains cells, maintaining the FIFO read and write pointers, and detecting FIFO overrun (TCER[OR]) conditions. 35.2.2 Transmit ATM Cell Functions The transmit ATM cell functions block (TCF) performs the ATM cell payload scrambling and is responsible for the HEC generation and the idle cell generation. The TCF scrambles (programmable by the user) the cell payload using the self-synchronizing scrambler with polynomial x43 + 1. The HEC is generated using the polynomial x8 + x2 + x + 1. The coset polynomial x6 +x4 +x2 + 1 is added (modulo 2) (programmable by the user) to the calculated HEC octet. The result overwrites the HEC octet on the transmitted cell. When the transmit FIFO is empty, the TCF inserts idle cells (counted in ICC). The TCF accumulates the number of transmitted assigned cells in a counter (TCC). Detection Correction Multi-bit error Mode Mode detected (Cell discarded) No error detected (correction) Single-bit error detected Error detected (Cell discarded) No error detected (No action) |
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