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MPC8280 Datasheet(PDF) 1222 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 1222 Page - Freescale Semiconductor, Inc |
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1222 / 1386 page ![]() ATM Transmission Convergence Layer MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 35-6 Freescale Semiconductor 35.2.2.1 Transmit ATM 2-Cell FIFO The transmit FIFO provides FIFO management and an interface to the UTOPIA transmit interface. The FIFO provides the cell rate decoupling between the transmission system physical layer and the ATM layer. The FIFO management includes emptying cells from the transmit FIFO, indicating to the UTOPIA interface that it is full, maintaining the FIFO read and write pointers, and detecting FIFO underrun (TCER[UR]) conditions. 35.2.3 Receive UTOPIA Interface This block performs the receive interface with the FCC via the UTOPIA bus. It implements the UTOPIA level-2 (multi-PHY) 8-bit PMD side (slave) interface. 35.2.4 Transmit UTOPIA Interface This block performs the transmit interface with the FCC via the UTOPIA bus. It implements the UTOPIA level-2 (multi-PHY) 8-bit PMD side (slave) interface. 35.3 Signals The TC layer is operated via an SI TDM port using a serial protocol. Synchronization signals are required for some applications and must be supported. Table 35-1 describes the signals required for operating the TC layer. 35.4 TC Layer Programming Mode This section describes the TC layer-specific registers and other programming model features. For a complete and concise list of TC layer registers, refer to Chapter 3, “Memory Map.” 35.4.1 TC Layer Registers Each TC layer block is controlled by registers located in the block and accessed from the 60x bus. Table 35-1. TC Layer Signals Signal Direction Description Txc Input Tx clock. Clocks Tx data out of the TC to external device. Txd Output Tx data from TC to external device. Txsyn Input Tx synch. Synchronizes the transmit data to the beginning of a frame. Rxc Input Rx clock. Clocks the data into the TC. Rxd Input Rx data. From external device to the TC. Rxsyn Input Rx synch. Synchronizes the received data. |
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