MPC8280 datasheet(1320/1386 Pages) FREESCALE

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Parallel I/O Ports

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

41-4

Freescale Semiconductor

41.2.4

Port Pin Assignment Register (PPAR)

The port pin assignment register (PPAR) is cleared at system reset.

Table 41-2 describes PPARx fields.

41.2.5

Port Special Options Registers A–D (PSORA–PSORD)

Figure 41-5 shows the port special options registers (PSORx).

123

Field DD01 DD11 DD21 DD31 DD4

DD5

DD6

DD7

DD8

DD9 DD10 DD11 DD12 DD13 DD14 DD15

Reset

0000_0000_0000_0000

R/W

Addr

0x10D04 (PPARA), 0x10D24 (PPARB), 0x10D44 (PPARC), 0x10D64 (PPARD)

Field DD16 DD17 DD18 DD19 DD20 DD21 DD22 DD23 DD24 DD25 DD26 DD27 DD28 DD29 DD30 DD31

Reset

0000_0000_0000_0000

R/W

Addr

0x10D06 (PPARA), 0x10D26 (PPARB), 0x10D46 (PPARC), 0x10D66 (PPARD)

1 These bits are valid for PPARA and PPARC only

Figure 41-4. Port Pin Assignment Register (PPARA–PPARD)

Table 41-3. PPAR Field Descriptions

Bits

Name

Description

0–31

Dedicated enable. Indicates whether a pin is a general-purpose I/O or a dedicated peripheral pin.

Note: Bits DD0–DD3 are valid for PPARA and PPARC only.

0 General-purpose I/O. The peripheral functions of the pin are not used.

1 Dedicated peripheral function. The pin is used by the internal module. The on-chip peripheral

function to which it is dedicated can be determined by other bits such as those is the PDIR.

MPC8280 Datasheet(PDF) 1320 Page - Freescale Semiconductor, Inc