MPC8280 datasheet(1317/1386 Pages) FREESCALE

1317 / 1386 page

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

41-1

Chapter 41

Parallel I/O Ports

The CPM supports four general-purpose I/O ports—ports A, B, C, and D. Each pin in the I/O ports can be

configured as a general-purpose I/O signal or as a dedicated peripheral interface signal. Port C is unique

in that 16 of its pins can generate interrupts to the interrupt controller.

Each pin can be configured as an input or output and has a latch for data output, read or written at any time,

and configured as general-purpose I/O or a dedicated peripheral pin. Part of the pins can be configured as

open-drain (the pin can be configured in a wired-OR configuration on the board). The pin drives a zero

voltage but three-states when driving a high voltage.

Note that port pins do not have internal pull-up resistors. Due to the CPM’s significant flexibility, many

dedicated peripheral functions are multiplexed onto the ports. The functions are grouped to maximize the

pins’ usefulness in the greatest number of MPC8280 applications. The reader may not obtain a full

understanding of the pin assignment capability described in this chapter without understanding the CPM

peripherals.

41.1

Features

The following is a list of the parallel I/O ports’ important features:

•

Port A is 32 bits

•

Port B is 28 bits

•

Port C is 32 bits

•

Port D is 28 bits

•

All ports are bidirectional

•

All ports have alternate on-chip peripheral functions

•

All ports are three-stated at system reset

•

All pin values can be read while the pin is connected to an on-chip peripheral

•

Open-drain capability on some pins

•

Port C offers 16 interrupt input pins

41.2

Port Registers

Each port has four memory-mapped, read/write, 32-bit control registers.

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