MPC8280 datasheet(1314/1386 Pages) FREESCALE

1314 / 1386 page

2C Controller

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

40-12

Freescale Semiconductor

Figure 40-12. I2C Memory Structure

40.7.1

I2C Buffer Descriptors (BDs)

Receive and transmit buffer descriptors report information about each buffer transferred and whether a

maskable interrupt should be generated. Each 64-bit BD, shown in Figure 40-13 and Figure 40-14, has the

following structure:

•

The half word at offset + 0 contains status and control bits. The CP updates the status bits after the

buffer is sent or received.

•

The half word at offset + 2 contains the data length (in bytes) that is sent or received.

— For an RxBD, this is the number of octets the CP writes into this RxBD’s buffer once the

descriptor closes. The CP updates this field after the received data is placed into the associated

buffer. Memory allocated for this buffer should be no smaller than MRBLR.

— For a TxBD, this is the number of octets the CP should transmit from its buffer. Normally, this

value should be greater than zero. The CP never modifies this field.

•

The word at offset + 4 points to the beginning of the buffer.

— For an RxBD, the pointer must be even and can point to internal or external memory.

— For a TxBD, the pointer can be even or odd. The buffer can reside in internal or external

memory.

40.7.1.1

I2C Receive Buffer Descriptor (RxBD)

Using RxBDs, the CP reports on each buffer received, closes the current buffer, generates a maskable

interrupt, and starts receiving data in the next buffer when the current one is full. It closes the buffer when

a stop or start condition is found on the I2C bus or when an overrun error occurs. The core should write

RxBD bits before the I2C controller is enabled.

Status and Control

Data Length

Buffer Pointer

Status and Control

Data Length

Buffer Pointer

Tx Buffer

I2C RxBD Table Pointer

(RBASE)

Rx Buffer

Dual-Port RAM

External Memory

TxBD Table

RxBD Table

Tx Buffer

I2C TxBD Table Pointer

(TBASE)

I2C RxBD Table

I2C TxBD Table

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