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MPC8280 Datasheet(PDF) 1356 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 1356 Page - Freescale Semiconductor, Inc

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MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
Index-2
Freescale Semiconductor
interrupt queue entry, 32-42
external statistics tables, 32-45
features, 32-1
framing formats, 32-4
internal statistics tables, 32-44
interworking functions
automatic data forwarding, 32-6
ATM-to-TDM, 32-7
TDM-to-ATM, 32-7
channel associated signaling support, 32-10
clock synchronization, 32-9
mapping
ATM-to-TDM CAS support, 32-14
CAS mapping, 32-14
CAS routing table, 32-12
CAS updates, 32-15
TDM-to-ATM support, 32-13
VC signaling to CAS blocks, 32-11
mapping TDM time slots, 32-9
timing issues, 32-7, 32-8
trunk condition, 32-10
memory structure, 32-22
parameter RAM, 32-22
OCASSR, 32-36
overview, 32-3
pointer verification mechanism, 32-21
receiver data flow, 32-6
sequence number protection table, 32-43
AAL2, 33-1
exceptions, 33-40
features, 33-3
introduction, 33-1
parameter RAM, 33-36
receiver, 33-21
AAL2 Rx data structures, 33-24
CID mapping tables and RxQDs, 33-28
CPS Rx queue descriptors, 33-28
CPS switch Rx queue descriptor, 33-30
receive connection tables, 33-25
SSSAR receive buffer descriptor, 33-34
SSSAR Rx queue descriptor, 33-32
SWITCH receive/transmit buffer descriptor (RxBD),
33-31
AAL2 switching, 33-23
figure, 33-24
CID mapping process, 33-23
mapping of PHY | VP | VC | CID, 33-22
overview, 33-21
sublayer structure, 33-2
switching example, 33-3
transmitter, 33-5
AAL2 Tx data structures, 33-9
CPS buffer structure, 33-16
CPS Tx queue descriptor, 33-14
SSSAR transmit buffer descriptor, 33-20
SSSAR Tx queue descriptor, 33-18
no-STF mode, 33-8
overview, 33-5
partial fill mode (PFM), 33-7
transmit priority mechanism, 33-5
fixed priority, 33-6
flow, 33-7
round robin priority, 33-6
flow, 33-6
user-defined cells in AAL2, 33-39
accessing dual-port RAM, 14-21
Acronyms and abbreviated terms, list, 1-lxxxiv, -2, II-2, III-2,
2-4
AppleTalk mode
GSMR, 26-4
programming example, 26-4
PSMR, 26-4
TODR, 26-4
ATM controller
AAL1 sequence number protection table, 31-80
AALn RxBD, 31-6, 31-71
AALn TxBD, 31-5, 31-76
ABR flow control, 31-8, 31-19
address compression, 31-15
ATM layer statistics, 31-33
ATM memory structure, 31-36
ATM pace control (APC) unit
ATM service types, 31-8
configuration, 31-102
data structures, 31-63
modes, 31-8
overview, 31-8
parameter tables, 31-64
priority table, 31-65
scheduling mechanism, 31-9
scheduling tables, 31-65
traffic type, 31-11
UBR+ traffic, 31-13
VBR traffic, 31-12
ATM TRANSMIT
command, 31-92
ATM-to-ATM data forwarding, 31-36
ATM-to-TDM interworking, 31-33
buffer descriptors, 31-66
exceptions, 31-82
external rate mode, 31-6
FCCE, 31-91
FCCM, 31-91
features list, 31-1
FPSMR, 31-88



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