MPC8280 datasheet(1359/1386 Pages) FREESCALE

1359 / 1386 page

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

Index-5

AAL1 sequence number protection table, 31-80

AALn RxBD, 31-6, 31-71

AALn TxBD, 31-5, 31-76

ABR flow control, 31-8, 31-19

address compression, 31-15

ATM layer statistics, 31-33

ATM memory structure, 31-36

ATM pace control (APC) unit

ATM service types, 31-8

configuration, 31-102

data structure, 31-63

modes, 31-8

overview, 31-8

parameter tables, 31-64

priority table, 31-65

scheduling mechanism, 31-9

scheduling tables, 31-65

traffic type, 31-11

UBR+ traffic, 31-13

VBR traffic, 31-12

ATM TRANSMIT

command, 31-92

ATM-to-ATM data forwarding, 31-36

ATM-to-TDM interworking, 31-33

buffer descriptors, 31-66

exceptions, 31-82

external rate mode, 31-6

FCCE, 31-91

FCCM, 31-91

features list, 31-1

FPSMR, 31-88

GFMR register, 31-88

global mode entry (GMODE), 31-40

internal rate mode, 31-6

interrupt queues, 31-82

maximum performance configuration, 31-101

OAM performance monitoring, 31-29, 31-62

OAM support, 31-27

operations and maintenance (OAM) support, 31-27

overview, 31-4

parameter RAM, 31-36

performance monitoring, 31-8

performance, maximum (configuration), 31-101

programming model, 31-88

receive connection table (RCT)

ATM channel code, 31-41

overview, 31-41

raw cell queue, 31-18

RCT entry format, 31-43

registers, 31-88

RxBD, 31-71

RxBD extension, 31-76

SRTS generation using external logic, 31-100

transmit connection table (TCT)

AALn protocol-specific TCTs, ??–31-57

ATM channel code, 31-41

overview, 31-41

TCT entry format, 31-50

transmit connection table extension (TCTE)

ABR protocol-specific, 31-59

ATM channel code, 31-41

overview, 31-41

UBR+ protocol-specific, 31-58

VBR protocol-specific, 31-57

transmit rate modes, 31-6

TxBD, 31-76

TxBD extension, 31-80

UDC extended address mode, 31-32

UEAD_OFFSET determination, 31-39

UNI statistics table, 31-81

user-defined cells (UDC)

extended address mode, 31-32

overview, 31-32

RxBD extension (AAL5/AAL1), 31-76

TxBD extension (AAL5/AAL1), 31-80

user-defined RxBD extension (AAL5/AAL1), 31-76

user-defined TxBD extension (AAL5/AAL1), 31-80

UTOPIA interface, 31-84

VCI filtering, 31-39

VCI/VPI address lookup, 31-13

VC-level address compression tables (VCLT), 31-17

VP-level address compression table (VPLT), 31-16

block diagram, 14-3

command set

command descriptions, 14-17

command execution latency, 14-19

command register example, 14-18

CPCR, 14-13

opcodes, 14-16

overview, 14-13

communications processor (CP)

block diagram, 14-7

execution from RAM, 14-9

features list, 14-4

microcode execution from RAM, 14-9

microcode revision number, 14-12

peripheral interface, 14-8

RCCR, 14-10

REV_NUM, 14-12

RTSCR, 14-11

RTSR, 14-12

CPM multiplexing logic (CMX)

block diagram, 16-2

overview, 16-1

dual-port RAM

MPC8280 Datasheet(PDF) 1359 Page - Freescale Semiconductor, Inc

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