MPC8280 datasheet(1361/1386 Pages) FREESCALE

1361 / 1386 page

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

Index-7

DCM, 19-18

DONEx, 19-14

DREQx, 19-13

DTS/STS programming, 19-21

dual-address transfers, 19-10

edge-sensitive mode, 19-14

exceptions, bus, 19-27

external request mode, 19-8

features list, 19-5

IDMR, 19-23

IDSR, 19-23

level-sensitive mode, 19-14

normal mode, 19-9

operand transfers, recognizing, 19-28

operation, 19-15

overview, 19-5

parallel I/O register programming, 19-28

parameter RAM, 19-16

priorities, 19-12

programming examples, 19-29

programming the parallel I/O registers, 19-28

signals, 19-13

single address transfers (fly-by), 19-10

transfers, 19-6

interrupt controller

memory map, 3-8

multi-channel controllers (MCCs)

CHAMR

HDLC mode, 29-8

transparent mode, 29-13, 29-15

channel extra parameters, 29-28

commands, 29-34

data structure organization, 29-2

exceptions, 29-35

features list, 29-1

global parameters, 29-4, 29-15

HDLC parameters (channel-specific), 29-5

initialization, 29-47

INTMSK, 29-15

MCCE, 29-37

MCCFx, 29-33

MCCM, 29-37

parameters for transparent operation, 29-11

RSTATE, 29-10

RxBD, 29-42

TSTATE, 29-7

TxBD, 29-45

overview, CPM, 14-1

parallel I/O ports

block diagram, 41-6

features, 41-1

overview, 41-1

PDATx, 41-2

PDIRx, 41-3

pin assignments (port A–port D), 41-8–41-20

PODRx, 41-1

port C interrupts, 41-20

port pin functions, 41-6

PPAR, 41-4

programming options, 41-8

PSORx, 41-4

registers, 41-1

resetting registers and parameters for all channels, 14-14

RISC timer tables

CP loading tracking, 14-32

features list, 14-27

initializing RISC timer tables, 14-30

interrupt handling, 14-31

overview, 14-27

parameter RAM, 14-27

RAM usage, 14-28

RTMR, 14-29

scan algorithm, 14-31

SET TIMER command, 14-30

table entries, 14-29

timer counts, comparing, 14-32

TM_CMD, 14-29

tracking CP loading, 14-32

SDMA channels

bus arbitration, 19-2

bus transfers, 19-2

LDTEA, 19-4

LDTEM, 19-4

overview, 19-1

PDTEA, 19-4

PDTEM, 19-4

programming model, 19-3

registers, 19-3

SDMR, 19-4

SDSR, 19-3

serial configuration, 14-3

serial peripheral interface (SPI)

block diagram, 39-1

clocking and pin functions, 39-2

commands, 39-12

configuring the SPI, 39-2

features list, 39-1

interrupt handling, 39-18

master mode, 39-3

maximum receive buffer length (MRBLR), 39-11

multi-master operation, 39-4

parameter RAM, 39-10

programming example

master, 39-16

MPC8280 Datasheet(PDF) 1361 Page - Freescale Semiconductor, Inc

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