MPC8280 datasheet(1364/1386 Pages) FREESCALE

1364 / 1386 page

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Index-10

Freescale Semiconductor

transparent mode

features list, 38-1

receive operation, 38-2

synchronization

achieving, 38-2

example, 38-3

external signals, 38-3

in-line pattern, 38-2

transmit operation, 38-2

FCCE register

ATM, 31-91

Ethernet, 36-21

FCC overview, 30-15

HDLC, 37-14

FCCM register

ATM, 31-91

Ethernet, 36-21

FCC overview, 30-15

HDLC, 37-14

FCCS (FCC status) register, 30-15, 37-16

FCRx (function code registers), 30-14

FDSRx (FCC data synchronization registers), 30-8

Features list

SIU interrupt controller, 4-7

Features lists

communications processor (CP), 14-4

communications processor module (CPM), 14-1

ATM controller, 31-1

parallel I/O ports, 41-1

CPM multiplexing, 16-2

Ethernet mode, 25-2

fast communications controllers (FCCs)

Fast Ethernet, 36-2

HDLC mode, 37-1

transparent mode, 38-1

G2_LE core, 2-3

HDLC bus controller, 22-18

2C controller, 40-2

IDMA emulation, 19-5

implementation-specific, 1-1

memory controller

features list, 11-3

new features supported, 11-1

multi-channel controllers (MCCs), 29-1

processor core, 2-3

RISC timer tables, 14-27

serial communications controllers (SCCs)

AppleTalk mode, 26-2

BISYNC mode, 23-2

general list, 20-2

HDLC mode, 22-1

transparent mode, 24-1

UART mode, 21-2

serial interface, 15-3

serial management controllers (SMCs)

general list, 28-2

transparent mode, 28-20

UART mode, 28-11

UART mode, features not supported, 28-10

serial peripheral interface (SPI), 39-1

timers, 18-1

Floating-point unit (FPU), 2-6

FPSMR register

Ethernet, 36-19

HDLC, 37-7

protocol-specific mode, 30-8

FPU, 2-3

Frame number (FRAME_N), 27-15

FTODRx (FCC transmit-on-demand registers), 30-9

features not present on PID6-603e, 2-5

G2_LE core

features, 2-3

branch processing unit, 2-6

completion unit, 2-7

dispatch unit, 2-5

execution units, 2-6

floating-point unit (FPU), 2-6

integer unit (IU), 2-6

load/store unit (LSU), 2-7

System register unit (SRU, 2-7

instruction queue (IQ), 2-5

instruction unit, 2-5

memory subsystem support, 2-7

overview, 2-1

GCI

activation and deactivation, 15-33

programming, 15-33

support, 15-31

General-purpose chip-select machine (GPCM)

common features, 11-5

differences between MPC8xx and MPC8280, 11-63

external access termination, 11-61

implementation differences with UPMs and SDRAM

machine, 11-6

interface signals, 11-52

MPC8xx versus MPC8280, 11-63

overview, 11-51

SRAM configuration, 11-52

strobe signal behavior, 11-53

terminating external accesses, 11-61

timing configuration, 11-53

MPC8280 Datasheet(PDF) 1364 Page - Freescale Semiconductor, Inc

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