MPC8280 datasheet(1381/1386 Pages) FREESCALE

1381 / 1386 page

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

Index-27

hunt mode, 21-9

normal asynchronous mode, 21-2

overview, 21-1

parameter RAM, 21-3

programming example, 21-22

RxBD, 21-14

serial management controllers

character mode, 28-11

commands, 28-12

data handling, 28-11

error handling, 28-13

features list, 28-11

features not supported by SMCs, 28-10

frame format, 28-10

message-oriented mode, 28-11

overview, 28-10

parameter RAM, 28-6

programming example, 28-19

reception process, 28-11

RxBD, 28-13

transmission process, 28-11

TxBD, 28-17

S-records loader application, 21-23

status reporting, 21-5

synchronous mode, 21-3

TxBD, 21-18

Universal serial bus (USB) controller

buffer descriptor ring, 27-22

clocking and pin functions, 27-2

commands

CP commands, 27-32

RESTART Tx command, 27-33

STOP Tx command, 27-33

enabling, 27-1

endpoint parameter block, 27-13

EPxPTR, 27-13

error handling, 27-33

errors

transmission errors, 27-33

features, 27-2

FRAME_N, 27-15

function mode, 27-4

transmit buffer descriptor (Tx BD), 27-26

transmit/receive, 27-5

host mode, 27-7

SOF transmission, 27-12

transmit buffer descriptor (Tx BD), 27-28

transmit/receive, 27-8

limitations, unsupported tasks, 27-2

overview, 27-1

parameter RAM, 27-12

memory map, 27-12

programming model, 27-16

receive buffer descriptor (Rx BD), 27-24

registers

RFCR (receive function code register), 27-16

TFCR (transmit function code register), 27-16

USADR (USB slave address register), 27-17

USBER (USB slave address register), 27-20

USBMR (USB mask register), 27-21

USBS (USB status register), 27-21

USCOM (USB command register), 27-19

USEPn (USB endpoint registers 1–4), 27-18

USMOD (USB mode register), 27-17

tokens, 27-6, 27-10

UPMs (user-programmable machines)

access times, handling devices, 11-102

address control bits, 11-77

address mulitplexing, 11-77

clock timing, 11-67

data sample control, 11-77

data valid, 11-77

differences between MPC8xx and MPC8280, 11-80

DRAM configuration example, 11-79

EDO interface example, 11-92

exception requests, 11-67

hierarchical bus interface example, 11-102

implementation differences with SDRAM machine and

GPCM, 11-6

loop control, 11-76

memory access requests, 11-66

memory system interface example, 11-81

MPC8xx versus MPC8280, 11-80

overview, 11-63

programming the UPM, 11-67

RAM array, 11-69

RAM word, 11-70

refresh timer requests, 11-66

requests, 11-65

signal negation, 11-78

software requests, 11-67

UPWAIT signal, 11-78

wait mechanism, 11-78

MPC8280 Datasheet(PDF) 1381 Page - Freescale Semiconductor, Inc

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