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MPC8280 Datasheet(PDF) 1379 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 1379 Page - Freescale Semiconductor, Inc |
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1379 / 1386 page ![]() MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor Index-25 transparent mode, 28-28 UART mode, 28-18 SMCM (SMC mask) register GCI mode, 28-35 transparent mode, 28-28 UART mode, 28-18 SMCMRs (SMC mode registers), 28-2 SPCOM, 27-19 SPCOM (SPI command) register, 39-10 SPI clocking and pin functions, 27-2 master mode, 27-5, 27-8 parameter RAM memory map, 27-12 programming model, 27-16 slave, 27-2 SPI block diagram, 27-5, 27-8 SPISEL, 27-24, 27-25 SPI block diagram, 27-5, 27-8 SPI buffer descriptor ring, 27-22 SPI memory map, 3-24 SPI receive buffer descriptor, 27-24 SPIE, 27-20 SPIE (SPI event) register, 39-9 SPIM (SPI mask) register, 39-9 SPMODE (SPI mode) register, 39-6 SWR (software watchdog register), 4-7 SWSR (software service register), 4-38 SYPCR (system protection control register), 4-37 System integration timers memory map, 3-5 System interface unit (SIU) 60x bus monitor function, 4-2 BCR, 4-26 block diagram, 4-1 bus monitor, 4-3 clocks, 4-3 configuration functions, 4-2 configuration/protection logic block diagram, 4-3 encoding the interrupt vector, 4-14 FCC relative priority, 4-12 highest priority interrupt, 4-13 IMMR, 4-36 interrupt controller features list, 4-7 interrupt source priorities, 4-9 interrupt vector calculation, 4-14 interrupt vector encoding, 4-14 interrupt vector generation, 4-14 L_TESCR1, 4-43 L_TESCR2, 4-44 LCL_ACR, 4-31 LCL_ALRH, 4-32 LCL_ALRL, 4-33 local bus monitor function, 4-2 masking interrupt sources, 4-13 MCC relative priority, 4-12 periodic interrupt timer (PIT), 4-5 periodic interrupt timer (PIT) function, 4-2 pin multiplexing, 4-51 PISCR, 4-47 PITC, 4-48 PITR, 4-49 port C interrupts, 4-16 PPC_ACR, 4-29 PPC_ALRH, 4-30 PPC_ALRL, 4-31 programming model, 4-17 registers, 4-17 SCC relative priority, 4-12 SCPRR_H, 4-19 SCPRR_L, 4-20 SICR, 4-17 SIEXR, 4-25 signal multiplexing, 4-51 SIMR_H, 4-22, 4-23 SIPNR_H, 4-21 SIPNR_L, 4-22 SIPRR, 4-18 SIUMCR, 4-33 SIVEC, 4-24 software watchdog timer, 4-6 SWR, 4-7 SWSR, 4-38 SYPCR, 4-37 system protection, 4-2 TESCR1, 4-40 TESCR2, 4-42 time counter (TMCNT) function, 4-2 overview, 4-4 timers, 4-3 TMCNT, 4-45 TMCNTAL, 4-46 TMCNTSC, 4-44 system interface unit,, 19-2 System register unit (SRU), 2-7 T TBST (transfer burst) signal, 8-12 TC layer block diagram, 35-4 cell counters, 35-12 corrected, TC_CCCx, 35-12 errored, TC_ECCx, 35-12 filtered, TC_FCCx, 35-13 IDLE, TC_ICCx, 35-12 |
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