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MPC8280 Datasheet(PDF) 1376 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 1376 Page - Freescale Semiconductor, Inc

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MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
Index-22
Freescale Semiconductor
overview, 20-15
RISC microcontroller, seeCommunications processor (CP)
RISC timer tables
CP loading tracking, 14-32
features list, 14-27
initializing RISC timer tables, 14-30
interrupt handling, 14-31
overview, 14-27
parameter RAM, 14-27
RAM usage, 14-28
RTMR, 14-29
scan algorithm, 14-31
SET TIMER command, 14-30
table entries, 14-29
timer counts, comparing, 14-32
TM_CMD, 14-29
tracking CP loading, 14-32
RMR (reset mode) register, 5-5
RSR (reset status) register, 5-4
RSTATE (internal receiver state) register, 29-10
RTMR (RISC timer mask register), 14-29
RTSCR (RISC time-stamp control register), 14-11
RTSR (RISC time-stamp register), 14-12
S
SCC memory map, 3-19
SCCE (SCC event) register
BISYNC mode, 23-15
HDLC mode, 22-12
transparent mode, 24-12
UART mode, 21-19
SCCE register
Ethernet mode, 25-20
SCCM (SCC mask) register
BISYNC mode, 23-15
HDLC mode, 22-12
transparent mode, 24-12
UART mode, 21-19
SCCM register
Ethernet mode, 25-20
SCCS (SCC status) register
BISYNC mode, 23-16
HDLC mode, 22-14
transparent mode, 24-13
UART mode, 21-21
SCIT programming, 15-33
SCPRR_H (CPM high interrupt priority register), 4-19
SCPRR_L (CPM low interrupt priority register), 4-20
SDMA channels
bus arbitration, 19-2
bus transfers, 19-2
LDTEA, 19-4
LDTEM, 19-4
overview, 19-1
PDTEA, 19-4
PDTEM, 19-4
programming model, 19-3
registers, 19-3
SDMR, 19-4
SDSR, 19-3
SDMR (SDMA mask register), 19-4
SDRAM interface, see SDRAM machine
SDSR (SDMA status register), 19-3
Serial communications controllers (SCCs)
AppleTalk mode
connecting to AppleTalk, 26-2
operating LocalTalk frame, 26-1
overview, 26-1
programming example, 22-22, 26-4
programming the controller, 26-3
BISYNC mode
commands, 23-4
control character recognition, 23-5
error handling, 23-9
frame reception, 23-3
frame transmission, 23-2
overview, 23-1
parameter RAM, 23-3
programming example, 23-18
programming the controller, 23-17
receiving synchronization sequence, 23-9
RxBD, 23-12
sending synchronization sequence, 23-9
TxBD, 23-14
Ethernet mode
address recognition, 25-11
collision handling, 25-12
commands, 25-9
connecting to Ethernet, 25-4
error handling, 25-13
frame reception, 25-6
hash table algorithm, 25-12
loopback, 25-13
overview, 25-1
programming example, 25-22
programming the controller, 25-9
receive buffer, 25-16
transmit buffer, 25-18
HDLC mode
accessing the bus, 22-18
bus controller, 22-16
collision detection, 22-16, 22-19
commands, 22-5
delayed RTS mode, 22-20



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