ACT8846 datasheet(32/63 Pages) QORVO

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ACT8846

Advanced PMU for Multi-core

Application Processors

Data Sheet Rev. 13.0, Nov. 11, 2019 | Subject to change without notice

32 of 63

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nRSTO Output

nRSTO is an open-drain output which asserts low upon

startup or when manual reset is asserted via the nPBIN

input. When asserted on startup, nRSTO remains low

until reset time-out period expires. When asserted due

to manual-reset, nRSTO immediately asserts low,

then remains asserted low until the nPBIN input is

de-asserted and the reset time-out period expires.

Connect a 10kΩ or greater pull-up resistor from nRSTO

to an appropriate voltage supply.

nIRQ Output

nIRQ is an open-drain output that asserts low any time

an interrupt is generated. Connect a 10kΩ or greater

pull-up resistor from nIRQ to an appropriate voltage

supply. nIRQ is typically used to drive the interrupt input

of the system processor.

Many of the ACT8846's functions support interrupt-gen-

eration as a result of various conditions. These are

typically masked by default, but may be unmasked via

the I2C interface. For more information about the avail-

able fault conditions, refer to the appropriate sections of

this datasheet.

Push-Button Control

The ACT8846 is designed to initiate a system enable

sequence when the nPBIN multi-function input is

asserted for 32ms. Once this occurs, a power-on

sequence commences, as described below. The power-

on sequence must complete and the microprocessor

must take control (by asserting PWRHLD) before nPBIN

is de-asserted. If the microprocessor is unable to

complete its power-up routine successfully before the

user

releases

the

push-button,

the

ACT8846

automatically shuts the system down. This provides

protection against accidental or momentary assertions

of the push-button. If desired, longer “push-and-hold”

times can be implemented by simply adding an

additional time delay before asserting PWRHLD.

Control Sequences

The ACT8846 features a variety of control sequences

that are optimized for supporting system enable and

disable, as well as SLEEP mode of the Rockchip

RK31x8 processors.

Enabling/Disabling Sequence

A typical enable sequence is initiated whenever the

nPBIN is asserted low for 32ms via 50KΩ resistance.

The power control diagram is shown in Figure 3. During

the boot sequence, the microprocessor must assert

PWRHLD (GPIO6_B0) to ensure that the system re-

mains powered after nPBIN is released. Once the

power-up routine is completed, the system remains en-

abled after the push-button is released as long as

PWRHLD is asserted high. If the processor does not as-

sert PWRHLD before the user releases the push-button,

the boot-up sequence is terminated and all regulators

are disabled. This provides protection against "false-en-

able", when the push-button is accidentally depressed,

and also ensures that the system remains enabled only

if the processor successfully completes the boot-up se-

quence.

As with the enable sequence, a typical disable se-

quence is initiated when the user presses the push-but-

ton, which interrupts the processor via the nPBSTAT

output. After system is turned on, the processor may

shut down the system by setting OFFSYSCLR[ ] to 1

then setting OFFSYS[ ] to 1, or by pulling PWRHLD to

logic low. The user could force shut down ACT8846 an-

ytime by pressing the power on push-button for 10 sec-

onds even when software crashes.

SLEEP Mode Sequence

The ACT8846 supports RK31x8 processor’s SLEEP

mode operation. Once a successful power-up routine

has been completed, SLEEP mode may be initiated

through a variety of software-controlled mechanisms.

SLEEP mode is typically initiated when the user presses

the push-button during normal operation. Pressing the

push-button asserts the nPBIN input, which asserts the

nPBSTAT output, which interrupts the processor. In

response to this interrupt the processor should disable

REG6, REG7, REG8, REG9, REG10 and REG12 via

I2C, then de-assert PWREN(GPIO6_B1), disabling

REG3. PWRHLD should remain asserted during

SLEEP mode so that REG1, REG2, REG4, REG5, and

REG11 remain enabled.

The ACT8846 wakes up from SLEEP mode when either

the push-button and/or PWREN (GPIO6_B1) is

asserted. In either case, REG3 is enable which allow

the system to resume normal operation.



: Only for ACT8846QM468

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