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ACT8846 Datasheet(PDF) 41 Page - Qorvo, Inc

Part # ACT8846
Description  Advanced PMU for Multi-core Application Processors
PDF  63 Pages
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Manufacturer  QORVO [Qorvo, Inc]
Direct Link  https://www.qorvo.com/
Logo QORVO - Qorvo, Inc

ACT8846 Datasheet(HTML) 41 Page - Qorvo, Inc

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ACT8846
Advanced PMU for Multi-core
Application Processors
Data Sheet Rev. 13.0, Nov. 11, 2019 | Subject to change without notice
41 of 63
www.qorvo.com
CMI OPTIONS
CMI 106: ACT8846QM106
Rail
VSET0 Voltage (V)
VSET1 Voltage (V)
Sequencing Input Trigger
StartUp Delay (us)
Soft-Start (us)
OUT1
1.2
1.2
OUT2
2000
400
OUT2
0.95
0.95
Vin UVLO
0
400
OUT3
3.3
3.3
OUT1
2000
400
OUT4
1.8
1.8
Vin UVLO
0
400
OUT5
1.8
n/a
Vin UVLO
0
140
OUT6
1.8
n/a
OUT1
2000
140
OUT7
3.3
n/a
Vin UVLO
0
140
OUT8
1.2
n/a
I2C
0
140
OUT9
2.8
n/a
I2C
0
140
OUT10
1.5
n/a
I2C
0
100
OUT11
2.8
n/a
I2C
0
100
OUT12
1.8
n/a
I2C
0
100
OUT13
1.8
n/a
I2C
0
100
Hardware Configuration
PWRHLD and PWREN must be connected together in CMI 106.
Startup
The ACT8846QM106-T has two startup sequences. The first is pushbutton startup. Asserting nPBIN low starts the
startup sequence. nPBIN must stay low until after PWRHLD and PWREN are asserted high by an external source,
usually a uP. If nPBIN goes high before PWRHLD goes high, the IC shuts down all outputs. The second startup
sequence is with the PWREN and PWRHLD pins. After input power is applied, asserting PWREN high starts the startup
sequence. Note that nPBIN should stay high in this application. In both startup conditions, OUT8/9/10/11/12/13 are off
by default, but can be enabled via I2C.
nRSTO
OUT2/4/5/7
40ms
VIN
PWRHLD and PWREN
OUT3/6
2ms
OUT1
2ms
nPBIN
UVLO
CMI 106 Startup with PWRHLD



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