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ADF4382ABCCZ Datasheet(PDF) 56 Page - Analog Devices |
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ADF4382ABCCZ Datasheet(HTML) 56 Page - Analog Devices |
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56 / 82 page  Data Sheet ADF4382A REGISTER MAP analog.com Rev. A | 56 of 82 Table 71. Bit Descriptions for REG0032 (Continued) Bits Bit Name Description Reset Access 0: charge pump bleed mode. 1: Σ-Δ mode. 4 EN_AUTO_ALIGN Enable Clock Align Mode. 0x0 R/W 0: phase adjustment is performed using a SPI write by setting PHASE_ADJ. 1: phase adjustment is performed using DEL_STR and DEL_ADJ pins. 3 PHASE_ADJ_POL Determines the Polarity of the Phase Adjustment. 0x0 R/W 0: subtracts the selected phase value. 1: add the selected phase value. [2:0] EFM3_MODE See the Σ-Δ Modulator Optimization Modes section. 0x0 R/W Address: 0x033, Reset: 0x00, Name: REG0033 Table 72. Bit Descriptions for REG0033 Bits Bit Name Description Reset Access [7:0] PHASE_ADJUSTMENT See the Phase Adjust section. 0x0 R/W Address: 0x034, Reset: 0x00, Name: REG0034 Table 73. Bit Descriptions for REG0034 Bits Bit Name Description Reset Access 7 PHASE_ADJ Apply the phase adjustment value set in PHASE_ADJUSTMENT. 0x0 R/W [6:4] DRCLK_DEL Sets the programmable input delay for the digital RCLK path. See Table 26 . 0x0 R/W [3:1] DNCLK_DEL Sets the programmable input delay for the digital NCLK path. See Table 26. 0x0 R/W 0 RST_CNTR Reset for Frequency Counter Test Mode. 0x0 R/W Address: 0x035, Reset: 0x00, Name: REG0035 Table 74. Bit Descriptions for REG0035 Bits Bit Name Description Reset Access [7:6] RESERVED Reserved. 0x0 R/W [5:0] M_VCO_BIAS Selects the Bias Value Used When O_VCO_BIAS = 1. 0x0 R/W Address: 0x036, Reset: 0x00, Name: REG0036 Table 75. Bit Descriptions for REG0036 Bits Bit Name Description Reset Access 7 RFOUTODIV_DB RFOUTO_DIV Double Buffered. 0x0 R/W 6 DCLK_DIV_DB DCLK_DIV1 and DNCLK_DIV1 Double Buffered. 0x0 R/W [5:2] RESERVED Reserved. 0x0 R/W 1 EN_LUT_GEN Enable the LUT generation. 0x0 R/W 0 EN_LUT_CAL Enable the Use of the Lookup Table for the Calibration. 0x0 R/W Address: 0x037, Reset: 0x00, Name: REG0037 Table 76. Bit Descriptions for REG0037 Bits Bit Name Description Reset Access [7:0] CAL_COUNT_TO Timeout value for each VCO calibration decision. See the VCO calibration section. 0x0 R/W |
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