ADF4382ABCCZ datasheet(23/82 Pages) AD

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Data Sheet

ADF4382A

THEORY OF OPERATION

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Rev. A | 23 of 82

Table 12. CP Programming

CP_I, Bits[3:0]

ICP (mA)

0.79

0.99

1.19

1.38

1.59

1.98

2.39

2.79

3.18

3.97

4.77

5.57

6.33

7.91

9.51

11.1

Charge Pump Test Mode

When the EN_CPTEST bit (Register 0x02E, Bit 2) is set to 1, the

CP_UP and CP_DOWN bits (Bit 1 and Bit 0, respectively) in the

same register can be programmed to force a constant ICP source

or sink current, respectively, on the CP pin. The EN_CPTEST or

CP_UP and CP_DOWN bits must be set to 0 to allow the loop to

lock. These bits can be used as an aid to debug PLL-related issues

during the hardware and software development phase of a project.

For normal operation, set EN_CPTEST, CP_UP, and CP_DOWN to

Table 13. Charge Pump Test Mode

EN_CPTEST

CP_UP CP_DOWN

CP Pin

State

Debug Test

High-Z

VCO open loop

~VV5_CP

Charge pump output

voltage verification

~GND

Charge pump output

voltage verification

Normal

operation

Not applicable

Charge Pump Bleed Current Optimization

A small programmable constant charge pump current, known as

bleed current, can be used to optimize the phase noise and frac-

tional spurious signals in fractional mode, which also changes the

propagation delay (tBLEED) from the REFP and REFN input pins to

the RFOUTP and RFOUTN output pins. In fractional mode, after

setting the bleed current for best performance, the output can be

shifted by using the phase word which is effectively used in the Σ-Δ

modulator (SDM). In integer mode, bleed current can be used to

shift the output in both directions.

To enable the bleed current, set the EN_BLEED bit to 1. When

the BLEED_POL bit is set to 1, a small constant source current is

forced onto the CP pin. When the register BLEED_POL is set to 0,

a small constant sink current is forced onto the CP pin.

The 13-bit bit field BLEED_I (Register 0x01D, Bits[7:0] and Register

0x01E, Bits[4:0]) is used to select the bleed current. This bit field

consists of both a coarse bleed and a find bleed value. The 4 MSBs

are used to calculate the coarse bleed current, and the 9 LSBs are

used to calculate the fine bleed current as shown in the following

equations.

ICOARSE BLEED=COARSE_BLEED×202 µA (31)

IFINE BLEED=FINE_BLEED×567 nA (32)

ITOTAL BLEED= ICOARSE BLEED+IFINEBLEED (33)

The propagation delay of the output frequency corresponds to the

ITOTAL BLEED as follows:

tBLEED= ITOTAL BLEED

ICP

×tPFD

(34)

where:

ICOARSE BLEED is the coarse bleed current.

COARSE_BLEED represents the 4 upper MSBs of the BLEED_I bit

field.

IFINE BLEED is the fine bleed current.

FINE_BLEED represents the lower 9 LSBs of the BLEED_I bit field.

ICP is the charge pump current value selected.

Bleed Current Modes

The ADF4382A spurious performance can be optimized by pro-

gramming tBLEED setting based on the frequency of operation. The

recommended tBLEED for the RFOUT frequency of operation for

each of the SDM modes are shown in Table 14.

To calculate the required BLEED_I setting required for a specific

tBLEED with the bleed current refer to Charge Pump Bleed Current

Optimization section. Figure 46 provides a quick reference for delay

step sizes for different charge pump settings and fFPD frequencies.

ADF4382ABCCZ Datasheet(PDF) 23 Page - Analog Devices

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