EMC2103 datasheet(22/84 Pages) SMSC

22 / 84 page

RPM-Based Fan Controller with HW Thermal Shutdown

Datasheet

Revision 0.85 (01-29-08)

SMSC EMC2103

DATASHEET

5.1.1

SHDN_SEL Pin

The EMC2103 has a ‘strappable’ input (SHDN_SEL) allowing for configuration of the hardware

Critical/Thermal Shutdown input channel. The pull-up resistor used on this pin identifies which

configuration setting is used as shown in Table 5.1.

Note 5.1

For the EMC2103-1, the decode for a 22k Ohm resistor on the SHDN_SEL pin will be to

use the External Diode 1 channel in Diode Mode (the same as the decode for a 6.8k Ohm

resistor) as the hardware shutdown device.

5.1.2

TRIP_SET Pin

The EMC2103’s TRIP_SET pin is an analog input to the Critical/Thermal Shutdown block which sets

the Thermal Shutdown temperature. The system designer creates a voltage level at the input through

a simple resistor connected to GND as shown in Figure 5.2. The value of this resistor is used to create

an input voltage on the TRIP_SET pin which is translated into a temperature ranging from 65°C to

127°C as shown in Table 5.2

APPLICATION NOTE: Current only flows when the TRIP_SET pin is being monitored. At all other times, the internal

reference voltage is removed and the TRIP_SET pin will be pulled down to ground.

APPLICATION NOTE: The TRIP_SET pin circuitry is designed to use a 1% resistor externally. Using a 1% resistor

will result in the Thermal / Critical Shutdown temperature being decoded correctly. If a 5%

resistor is used, then the Thermal / Critical Shutdown temperature may be decoded with as

much as ±1°C error.

Table 5.1 SHDN_SEL Pin Decode

PULL UP RESISTOR

MODE OF OPERATION

CONFIGURATION MECHANISM

< 4.7k Ohm

External Diode 1 Simple Mode -

Beta compensation disabled, REC

disabled - recommended for AMD

CPU diodes

Host control via SMBus

6.8k Ohm

External Diode 1 Diode Mode -

Beta compensation disabled, REC

enabled

Host control via SMBus

10k Ohm

External Diode 1 Transistor Mode -

Beta compensation enabled, REC

enabled - recommended for Intel

45nm and 65mn CPU diodes

Host control via SMBus

15k Ohm

Internal Diode

Host control via SMBus

22k Ohm

External Diode 2 Transistor Mode -

Beta Compensation enabled, REC

enabled (EMC2103-2 only) See

Note 5.1

Host control via SMBus

> 33k Ohm

External Diode 1 Transistor Mode -

Beta compensation enabled, REC

enabled

Host control via SMBus

EMC2103 Datasheet(PDF) 22 Page - SMSC Corporation

EMC2103 Datasheet(HTML) 22 Page - SMSC Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84

Datasheet Download

Link URL