EMC2103 datasheet(67/84 Pages) SMSC

67 / 84 page

RPM-Based Fan Controller with HW Thermal Shutdown

Datasheet

SMSC EMC2103

Revision 0.85 (01-29-08)

DATASHEET

If the output is configured as a push-pull output, then output pin will immediately be driven to match

the corresponding bit setting.

Bit 1 - GPIO2_OUT - Controls the pin state of the GPIO2 pin when it is configured as a GPIO output.

Bit 0 - GPIO1_OUT - Controls the pin state of the GPIO1 pin when it is configured as a GPIO output.

6.38

GPIO Interrupt Enable Register (EMC2103-2 Only)

The GPIO Interrupt Enable Register enables the GPIOs to assert the ALERT pin when they change

state. When the GPIO pins are configured as outputs, then these bits are ignored.

Bit 1 - GPIO2_INT_EN - Allows the ALERT pin to be asserted when the GPIO2 pin changes state

(when configured as an input).

‘0’ (default) - The ALERT pin will not be asserted when the GPIO2 pin changes state (when

configured as an input).

‘1’ - The ALERT pin will be asserted when the GPIO2 pin changes state (when configured as an

input)

Bit 0 - GPIO1_INT_EN - Allows the ALERT pin to be asserted when the GPIO1 pin changes state

(when configured as an input).

‘0’ (default) - The ALERT pin will not be asserted when the GPIO1 pin changes state (when

configured as an input).

‘1’ - The ALERT pin will be asserted when the GPIO1 pin changes state (when configured as an

input)

6.39

GPIO Status Register (EMC2103-2 Only)

The GPIO Status Register indicates which GPIO has changed states to cause the ALERT pin to be

asserted. This register is cleared when it is read. The bits in this register are set whenever the

corresponding GPIO changes states regardless if the ALERT pins are asserted. Once a bit is set, it

will remain set until read.

If any bit in this register is set, then the GPIO status bit will be set.

Bit 1 - GPIO2_STS - Indicates that the GPIO2 pin has changed states from a ‘0’ to a ‘1’ or a ‘1’ to a

‘0’ (when configured as a GPIO input).

Bit 0 - GPIO1_STS - Indicates that the GPIO1 pin has changed states from a ‘0’ to a ‘1’ or a ‘1’ to a

‘0’ (when configured as a GPIO input).

Table 6.54 GPIO Interrupt Enable Register

ADDR

R/W

DEFAULT

E5h

R/W

GPIO

Interrupt

Enable

GPIO2_

INT_EN

GPIO1_

INT_EN

00h

Table 6.55 GPIO Status Register

ADDR

R/W

DEFAULT

E6h

R-C

GPIO

Status

GPIO2_

STS

GPIO1_

STS

00h

EMC2103 Datasheet(PDF) 67 Page - SMSC Corporation

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