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L99LDLH32 Datasheet(PDF) 58 Page - STMicroelectronics |
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L99LDLH32 Datasheet(HTML) 58 Page - STMicroelectronics |
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58 / 142 page ![]() FTP and RAM memory mapping L99LDLH32 58/142 DS12879 Rev 6 09h PWM_DUTY_CH28-31 Read/Write/ Broadcast Write Exponential 8-bit individual PWM duty cycle Channel 28-31 (2) 0Ah CURR_SET_CH0_3 Read/Write/ Broadcast Write 8-bit analogue current setting Channel 0-3 (2) 0Bh CURR_SET_CH4_7 Read/Write/ Broadcast Write 8-bit analogue current setting Channel 4-7 (2) 0Ch CURR_SET_CH8_11 Read/Write/ Broadcast Write 8-bit analogue current setting Channel 8-11 (2) 0Dh CURR_SET_CH12_15 Read/Write/ Broadcast Write 8-bit analogue current setting Channel 12-15 (2) 0Eh CURR_SET_CH16_19 Read/Write/ Broadcast Write 8-bit analogue current setting Channel 16-19 (2) 0Fh CURR_SET_CH20_23 Read/Write/ Broadcast Write 8-bit analogue current setting Channel 20-23 (2) 10h CURR_SET_CH24_27 Read/Write/ Broadcast Write 8-bit analogue current setting Channel 24-27 (2) 11h CURR_SET_CH28_31 Read/Write/ Broadcast Write 8-bit analogue current setting Channel 28-31 (2) 12h DIN_MAP_CH0_15 Read/Write Direct Input Mapping Channel 0- 15 (2) 13h DIN_MAP_CH16_31 Read/Write Direct Input Mapping Channel 16_31 (2) 14h not used 15h CONFIG_1 Read/Write Device Configuration Register 1 (1) 16h CONFIG_2 Read/Write Device Configuration Register 2, Power Good thresholds VPRE_REG, Short Circuit detection thresholds (1) 17h CONFIG_3 Read/Write Device Configuration Register 3 (1) 18h CONFIG_4 Read/Write Device Configuration Register 4, Chip Select Enable and mode transistion bits (1) 19h WD_TRIG Read/Write Watchdog trigger (1) Status 1Ah Chain_IDPOS Read ChainID and Position number Responder ID0 & Responder ID1 (1) 1Bh Not used 1Ch Not used 1Dh Not used 1Eh Not used Table 15. RAM memory map (continued) Address Name Access Content Note |
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