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JS48F4400P0P3C0 Datasheet(PDF) 59 Page - Numonyx B.V |
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JS48F4400P0P3C0 Datasheet(HTML) 59 Page - Numonyx B.V |
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59 / 139 page ![]() April 2008 Datasheet 309823-10 59 Numonyx™ StrataFlash® Cellular Memory (M18) Note: R2, R3 and R103 apply to legacy-latching only; R315 and R316 apply to clock-only latching only. Notes: 1. R2, R3 and R103 apply to legacy-latching only (ADV# OR CLK latching); R315 and R316 apply to clock-only latching only 2. A burst can be interrupted by toggling CE# or ADV#. Figure 28: Synchronous Continuous Mis-Aligned Burst (AD-Mux) A A Q Q Q End of WL Q Q Q R111 R5 R13 R14 R307 R312 R307 R312 R307 R15 R16 R12 R9 R10 R314 R107 R7 R4 R11 R11 R8 R10 R303 R102 R3 R105 R105 R316 R317 R313 R106 R104 R101 R316 R311 R301 R104 R103 R304 R305 R304 R305 R315 R304 R2 R306 R302 R1 R202 R201 R202 R202 R202 R201 Latency Count R1 Latency Count CLK A[MAX:16] A/DQ[15:0] ADV# CE# OE# WAIT RST# Figure 29: Synchronous Burst with Burst-Interrupt (AD-Mux) A A A Q Q Q A R111 R5 R307 R15 R16 R12 R9 R10 R314 R107 R7 R4 R11 R303 R102 R11 R303 R102 R3 R316 R313 R10 R104 R101 R316 R105 R311 R301 R104 R105 R316 R317 R313 R106 R104 R101 R316 R311 R301 R104 R103 R306 R302 R304 R305 R315 R304 R2 R306 R302 R1 R202 R201 R202 R202 R202 R201 Latency Count R1 Latency Count CLK A[MAX:16] A/DQ[15:0] ADV# CE# OE# WAIT RST# |
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