C167CS-4RM datasheet(69/517 Pages) INFINEON

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C167CS

Derivatives

The Central Processing Unit (CPU)

User’s Manual

4-19

V2.0, 2000-07

Note: The MULIP flag is a part of the task environment! When the interrupting service

routine does not return to the interrupted multiply/divide instruction (i.e. in case of

a task scheduler that switches between independent tasks), the MULIP flag must

be saved as part of the task environment and must be updated accordingly for the

new task before this task is entered.

CPU Interrupt Status (IEN, ILVL)

The Interrupt Enable bit allows to globally enable (IEN = ‘1’) or disable (IEN = ‘0’)

interrupts. The four-bit Interrupt Level field (ILVL) specifies the priority of the current CPU

activity. The interrupt level is updated by hardware upon entry into an interrupt service

routine, but it can also be modified via software to prevent other interrupts from being

acknowledged. In case an interrupt level ‘15’ has been assigned to the CPU, it has the

highest possible priority, and thus the current CPU operation cannot be interrupted

except by hardware traps or external non-maskable interrupts. For details please refer

to Chapter 5.

After reset all interrupts are globally disabled, and the lowest priority (ILVL = 0) is

assigned to the initial CPU activity.

The Instruction Pointer IP

This register determines the 16-bit intra-segment address of the currently fetched

instruction within the code segment selected by the CSP register. The IP register is not

mapped into the C167CS’s address space, and thus it is not directly accessible by the

programmer. The IP can, however, be modified indirectly via the stack by means of a

return instruction.

The IP register is implicitly updated by the CPU for branch instructions and after

instruction fetch operations.

Instruction Pointer

- - - (- - - -/- -)

Reset Value: 0000H

9876

543210

(r)(w)h

Bit

Function

Specifies the intra segment offset, from where the current instruction is

to be fetched. IP refers to the current segment <SEGNR>.

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