C167CS-4RM datasheet(80/517 Pages) INFINEON

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C167CS

Derivatives

The Central Processing Unit (CPU)

User’s Manual

4-30

V2.0, 2000-07

The Multiply/Divide High Register MDH

This register is a part of the 32-bit multiply/divide register, which is implicitly used by the

CPU, when it performs a multiplication or a division. After a multiplication, this non-bit

addressable register represents the high order 16 bits of the 32-bit result. For long

divisions, the MDH register must be loaded with the high order 16 bits of the 32-bit

dividend before the division is started. After any division, register MDH represents the

16-bit remainder.

Whenever this register is updated via software, the Multiply/Divide Register In Use

(MDRIU) flag in the Multiply/Divide Control register (MDC) is set to ‘1’.

When a multiplication or division is interrupted before its completion and when a new

multiply or divide operation is to be performed within the interrupt service routine,

results.

A detailed description of how to use the MDH register for programming multiply and

divide algorithms can be found in Chapter 22.

MDH

Multiply/Divide High Reg.

SFR (FE0CH/06H)

Reset Value: 0000H

9876

543210

mdh

rwh

Bit

Function

mdh

Specifies the high order 16 bits of the 32-bit multiply and divide reg. MD.

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