SABRE-LL-I datasheet(90/141 Pages) STMICROELECTRONICS

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Interrupt controller

SABRE-LL-I

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20.2

Interrupt controller monitored signal

The table here below contains the events that can be monitored by the interrupt controller.

Any event detection can be enabled and disabled by setting at logic level 1 the relative

enable bit in the interrupt controller configuration register (IntCrtlCfg).

The interrupt controller can be programmed to give a pulse when a monitored event

happens or to continuously maintaining the output active until the interrupt condition is

finished.

When programmed to signal the enabled events by giving pulses, the interrupt controller

can be configured to disable the event that caused the interrupt request until the firmware

re-enables it writing the relative bit in the control register (IntCrtlCtrl) or to continue to

monitor the event.

The GPIO output of this circuit can be programmed to be active high or active low.

Table 63.

Interrupt controller event

Event

Event description

Notes

Mtr1Fault

Bridge 1 fault (Ilimit event)

Mtr2Fault

Bridge 2 fault (Ilimit event)

Mtr3Fault

Bridge 3 fault (Ilimit event)

Mtr4Fault

Bridge 4 fault (Ilimit event)

nAWAKE

nAWAKE pin low

SwRegCtrl Ilimit

Switching regulator controller Ilimit event.

VMainSW Ilimit

Main switching regulator Ilimit event.

LowPowSw 1

Low voltage power switch 1 Ilimit event.

LowPowSw 2

Low voltage power switch 2 Ilimit event

Warm

Warming event

WDWarn

Watch dog warning event

Watch dog event

DigCmp

Digital comparator

ADCDone1

ADC conversion done 1

(1)

This event is disabled if the related ADC channel is configured in continuous mode.

ADCDone2

ADC conversion done 2

(1)

Vloop1Ilim

AUX1 Ilimit event.

Table 64.

Interrupt controller specification

Parameter

Description

Test condition

Min

Typ

Max

Unit

tPULSE

Pulse duration

16*Tosc

µs

tINTFILT

Filter time

200

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