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SABRE-LL-I Datasheet(PDF) 101 Page - STMicroelectronics |
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SABRE-LL-I Datasheet(HTML) 101 Page - STMicroelectronics |
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101 / 141 page ![]() SABRE-LL-I GPIO pins 101/141 22.4 GPIO[2] The GPIO[2] truth table is (for the abbreviation list please refer to Table 68): Table 73. GPIO[2] truth AUX2Enable or AUX2System GPIO[1] SPI BITS Function Note GpioOut Enable [1] Mode[2] Mode[1] Mode[0] 1X X X X AUX2 FB (1) 1. AUX2Enable or AUX2System bit =1 represent the case in which AUX1 is used as a System or Not System regulator. 00 0 X X HiZ (SPI_IN) 0 0 1 X X Comp1 IN - (2) 2. In all configurations in which GPIO[2] is enabled as output: a) the GPIO[2] pin can be always used as an analog input to the ADC system (ADC function) by writing its address in the A2DChannelX[4:0] in the A2DConfigX register and starting a conversion; b) the GPIO[2] pin can be always used as a digital input so its value can be always read through SPI interface (SPI_IN function); c) please note that GPIO[2] output is directly connected to ExtPWM3 input for Bridge 3 or 4 and therefore particular care must be taken in order to avoid wrong PWM signals when ExtPWM3 is selected for bridge 3 or 4; d) the GPIO[2] pin is an open drain output. 0 100 0 SPI OUT (2) 0 100 1 AuxPwm2 (2) 0 101 0 AuxPwm3 (2) 0 1 0 1 1 InterruptCtrl (2) 0 110 0 SPI OUT inverted (2) 0 110 1 AuxPwm2 inverted (2) 0 111 0 AuxPwm3 inverted (2) 0 111 1 IntCtrlinverted (2) |
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