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SABRE-LL-I Datasheet(PDF) 113 Page - STMicroelectronics |
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SABRE-LL-I Datasheet(HTML) 113 Page - STMicroelectronics |
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113 / 141 page ![]() SABRE-LL-I GPIO pins 113/141 22.10 GPIO[8] The GPIO[8] truth table is (for the abbreviation list please refer to Table 68): Table 85. GPIO[8] truth EnDac (1) 1. The EnDAC bit in the CurrDacCtrl register enables the Current DAC (seeChapter 17) GPIO[8] SPI BITS Function (2) 2. This pin is 5 volt input tolerant. Note GpioOut enable[8] Mode[2] Mode[1] Mode[0] 1 X X X X CurrDAC (3) 3. When EnDAC = ‘1’ the GpioOutEnable[8] bit is forced to 0. The current DAC circuit is directly connected to GPIO[8] pin so as soon as it is enabled it will sink current from pin. 0 0 X X X HiZ (SPI_IN) (4) 4. The GPIO[8] pin can be always used as a digital input so its value can be always read through SPI interface (SPI_IN function). To avoid affecting the precision of CurrDAC when this is used to sink very low currents, it is necessary to enable the digital input functionality of GPIO[8]. Therefore to read their values through SPI interface (SPI_IN function), it is necessary to enable the EnGpio8DigIn bit in the CurrDacCtrl register. 0 1 0 0 0 SPI OUT (4) 01 0 0 1 AuxPwm1 (4) 01 0 1 0 AuxPwm3 (4) 0 1 0 1 1 Comp2OUT (4) 01 1 0 0 AuxPwm1 inverted (4) 01 1 0 1 AuxPwm3 inverted (4) 0 1 1 1 1 Comp2OUT inverted (4) |
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