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HD404612FS Datasheet(PDF) 10 Page - Renesas Technology Corp

Part # HD404612FS
Description  4-Bit Single-Chip Microcomputer
PDF  91 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD404612FS Datasheet(HTML) 10 Page - Renesas Technology Corp

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HD404618 Series
8
Memory Map
ROM Memory Map
The ROM memory map is shown in figure 1, and the ROM is described below.
0
15
16
63
64
4095
4096
8191
8192
16383
0
$000F
$0FFF
$1000
$1FFF
$2000
$3FFF
$0010
$003F
$0040
Vector address
Zero-page subroutine
(64 words)
Pattern
(4096 words)
Not used
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
$0000
$0000
$0001
$0002
$0003
$0004
$0005
$0006
$0007
$0008
$0009
$000A
$000B
$000C
$000D
$000E
$000F
JMPL instruction
(jump to reset routine)
JMPL instruction
(jump to
INT routine)
0
JMPL instruction
(jump to timer A routine)
1
JMPL instruction
(jump to timer B routine)
JMPL instruction
(jump to timer C routine)
JMPL instruction
(jump to serial routine)
JMPL instruction
(jump to
INT routine)
* HD404612: 2048 words
HD404614: 4096 words
HD404616: 6144 words
HD404618, HD4074618: 8192 words
Program*
Note:
Figure 1 ROM Memory Map
Vector Address Area ($0000–$000F): Reserved for JMPL instructions that branch to the start addresses
of the reset and interrupt routines. After an MCU reset or interrupt execution, the program starts from the
vector address.
Zero-Page Subroutine Area ($0000–$003F): Reserved for subroutines. The program branches to a
subroutine in this area in response to the CAL instruction.
Pattern Area ($0000–$0FFF): Contains ROM data that can be referenced with the P instruction.
Program Area ($0000–$07FF (HD404612), $0000–$0FFF (HD404614), $0000–$17FF (HD404616),
$0000–$1FFF (HD404618, HD4074618)): Used for program coding.



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